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    RTAX-S LVDS Search Results

    RTAX-S LVDS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN65LVDS050PW Texas Instruments Dual LVDS Transceiver 16-TSSOP Visit Texas Instruments Buy
    SN65LVDS1DBVTG4 Texas Instruments 630-Mbps single LVDS driver 5-SOT-23 -40 to 85 Visit Texas Instruments Buy
    SN65LVDS1050PW Texas Instruments Dual LVDS Transceiver 16-TSSOP -40 to 85 Visit Texas Instruments Buy
    SN65LVDS179DGKR Texas Instruments Single Full-Duplex LVDS Transceiver 8-VSSOP -40 to 85 Visit Texas Instruments Buy
    SN65LVDS180D Texas Instruments Single Full-Duplex LVDS Transceiver 14-SOIC -40 to 85 Visit Texas Instruments Buy

    RTAX-S LVDS Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    RTAX-S lvds

    Abstract: ASK transmitter and receiver pair AN-1040 AN-1059 vhdl code for lvds driver
    Text: Application Note AC288 Using LVDS for Actel's Axcelerator and RTAX-S/SL Devices Introduction This application note describes the Low Voltage Differential Standard LVDS I/O capabilities of Actel's Axcelerator and RTAX-S/SL device families. The application note begins by describing the LVDS signaling


    Original     		AC288 ANSI/TIA/EIA-644 RTAX-S lvds ASK transmitter and receiver pair AN-1040 AN-1059 vhdl code for lvds driver PDF

    RTAX1000S-SL

    Abstract: RTAX2000 actel PLL schematic LVCMOS25 signal path designer JESD8-11
    Text: Application Note AC310 RTAX-S/SL Clocking Resource and Implementation Introduction Actel's RTAX-S/SL FPGA family offers the most flexible global network scheme of any antifuse-based FPGA to date. This architecture provides eight segmentable chip-wide global networks, and dedicated power-on


    Original     		AC310 RTAX1000S-SL RTAX2000 actel PLL schematic LVCMOS25 signal path designer JESD8-11 PDF

    RTAX250

    Abstract: RTAX4000DL RTAX4000D CG624 RTAX4000S LG1152 TRANSISTOR TB 772 SL RTAX2000S ACTEL CCGA 624 mechanical transistor prc 606 j
    Text: Revision 15 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 RTAX250 RTAX4000DL RTAX4000D CG624 RTAX4000S LG1152 TRANSISTOR TB 772 SL RTAX2000S ACTEL CCGA 624 mechanical transistor prc 606 j PDF

    w32 smd transistor

    Abstract: rtax250sl RTAX2000S w32 smd transistor 143 41-bit Carry Look-ahead Adder RTAX2000SL RTAX4000S BY415 RTAX4000D LG1152
    Text: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 MIL-STD-883B w32 smd transistor rtax250sl RTAX2000S w32 smd transistor 143 41-bit Carry Look-ahead Adder RTAX2000SL RTAX4000S BY415 RTAX4000D LG1152 PDF

    RTAX2000D

    Abstract: LG1152 CDB 455 C34
    Text: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 RTAX2000D LG1152 CDB 455 C34 PDF

    624 CCGA

    Abstract: CQ352 transistor prc 606 j rtax250 RTAX2000 rtax4000
    Text: Revision 14 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 624 CCGA CQ352 transistor prc 606 j rtax250 RTAX2000 rtax4000 PDF

    Untitled

    Abstract: No abstract text available
    Text: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 MIL-STD-883B PDF

    RTAX2000

    Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
    Text: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		TM1019 MIL-STD-883B Extended600 RTAX2000 RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s PDF

    SpaceWire

    Abstract: RTAX-S lvds SpaceWire cable telemetry block diagram AC305 Signal Path Designer
    Text: Application Note AC305 Implementation of the SpaceWire Clock Recovery Logic in Actel RTAX-S Devices Introduction This application notes describes the implementation of the SpaceWire clock recovery circuit in an Actel RTAX-S device. SpaceWire uses Data-Strobe DS encoding, and is widely used to handle payload data onboard a spacecraft. One of the challenging issues when implementing SpaceWire in an FPGA is to


    Original     		AC305 SpaceWire RTAX-S lvds SpaceWire cable telemetry block diagram AC305 Signal Path Designer PDF

    RTAX2000

    Abstract: TB125 24mA-drive 352-Pin
    Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment Clamp Diode Hot Insertion 5V Tolerance Input Buffer Output Buffer LVTTL No Yes No Enabled/Disabled 3.3V PCI Yes No Yes1 Enabled/Disabled LVCMOS2.5V No Yes


    Original     		JESD8-11) RTAX2000 TB125 24mA-drive 352-Pin PDF

    ACTEL CCGA 624 mechanical

    Abstract: LG1152 RTAX2000S ACTEL burn-in RTAX250S LGA 2011 Socket diagram RTAX2000 ACTEL CCGA 1152 mechanical cg624 RTAX1000S
    Text: v5.4 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 ACTEL CCGA 624 mechanical LG1152 RTAX2000S ACTEL burn-in RTAX250S LGA 2011 Socket diagram RTAX2000 ACTEL CCGA 1152 mechanical cg624 RTAX1000S PDF

    LGA 478 SOCKET PIN LAYOUT

    Abstract: RTAX2000
    Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 LGA 478 SOCKET PIN LAYOUT RTAX2000 PDF

    RTAX2000

    Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
    Text: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 RTAX2000 rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3 PDF

    Untitled

    Abstract: No abstract text available
    Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment Clamp Diode Hot Insertion 5V Tolerance Input Buffer Output Buffer LVTTL No Yes No Enabled/Disabled 3.3V PCI Yes No Yes1 Enabled/Disabled LVCMOS2.5V No Yes


    Original     		JESD8-11) PDF

    LG1152

    Abstract: ACTEL CCGA 624 mechanical A54SXA LG1272 CQ352
    Text: v5.3 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 LG1152 ACTEL CCGA 624 mechanical A54SXA LG1272 CQ352 PDF

    MIL-PRF-38535 appendix a

    Abstract: RTAX2000S rtax250s diode smd f6 sl TDC 1809 cga 624 624-CCGA RTAX2000 ACTEL CCGA to FBGA Adapter RTAX1000S
    Text: v5.4 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 MIL-PRF-38535 appendix a RTAX2000S rtax250s diode smd f6 sl TDC 1809 cga 624 624-CCGA RTAX2000 ACTEL CCGA to FBGA Adapter RTAX1000S PDF

    RTAX1000SL

    Abstract: No abstract text available
    Text: RTAX-S/SL RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment LVTTL Clamp Diode Hot Insertion / Cold Sparing 5V Tolerance No Yes No Input Buffer Output Buffer Enabled/Disabled 1 3.3 V PCI Yes No Yes Enabled/Disabled


    Original     		JESD8-11) RTAX1000SL PDF

    Synplify tmr

    Abstract: 2965A ACTEL CCGA 1152 mechanical RTAX2000 CGS624 A54SX16 TM-3015 CCGA RTAX1000S-SL rtax250s
    Text: v5.3 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		TM1019 Synplify tmr 2965A ACTEL CCGA 1152 mechanical RTAX2000 CGS624 A54SX16 TM-3015 CCGA RTAX1000S-SL rtax250s PDF

    RTAX1000SL

    Abstract: RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector
    Text: RTAX-S/SL RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment 3.3 V LVTTL Clamp Diode Hot Insertion / Cold Sparing 1 Yes 5V Tolerance Input Buffer Output Buffer No 1 Yes Enabled/Disabled Enabled/Disabled 3.3 V PCI


    Original     		JESD8-11) RTAX1000SL RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector PDF

    RTAX2000S-CQ352

    Abstract: No abstract text available
    Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment LVTTL Clamp Diode Hot Insertion / Cold Sparing 5V Tolerance No Yes No Input Buffer Output Buffer Enabled/Disabled 1 3.3 V PCI Yes No Yes Enabled/Disabled


    Original     		JESD8-11) RTAX2000S-CQ352 PDF

    Untitled

    Abstract: No abstract text available
    Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • Supply Voltages VCCA VCCI Input Tolerance Output Drive Level 1.5V 1.5V 3.3V 1.5V 1.5V 1.8V 3.3V 1.8V 1.5V 2.5V 3.3V 2.5V 1.5V 3.3V 3.3V 3.3V Table 2-2 • I/O Features Comparison I/O Assignment


    Original     		JESD8-11) AX125 PDF

    56 pin edac connector

    Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
    Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		TM1019 56 pin edac connector PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical PDF

    RTAX250S

    Abstract: RTAX2000S RTAX1000S LG1152 CG1272 RTAX4000S RTAX1000S-SL RTAX2000 CQ208 RTAX-S lvds
    Text: P ro du c t Br ie f RTAX-S/SL RadTolerant FPGAs u e Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37


    Original     		TM1019 5172169PB-11/5 RTAX250S RTAX2000S RTAX1000S LG1152 CG1272 RTAX4000S RTAX1000S-SL RTAX2000 CQ208 RTAX-S lvds PDF

    SILEX

    Abstract: CQ352
    Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		TM1019 SILEX CQ352 PDF