Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    RUR 450 Search Results

    RUR 450 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    dmo 265 r

    Abstract: No abstract text available
    Text: PRELIMINARY XRT86SH328 28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET NOVEMBER 2006 GENERAL DESCRIPTION The XRT86SH328 is an integrated VT/TU Mapper with 28 port T1/E1 Line Interface Units. The XRT86SH328 contains integrated DS1/E1/J1 Framers for performance monitoring.


    Original
    XRT86SH328 28-CHANNEL XRT86SH328 dmo 265 r PDF

    led cross reference

    Abstract: XRT94L33 0x0382 0x1151 GR-253-CORE XRT94L33IB 0X176C 0x1738
    Text: XRT94L33 333-C C H A N N E L D S E S T S T O S T S S T M M A P P E R A T M R E G S T E R S CH HA AN NN NE EL LD DS S333///E E333///S ST TS S-111 T TO OS ST TS S-333///S ST TM M-111 M MA AP PP PE ER R ––– A AT TM MR RE EG GIIIS ST TE ER RS S March 2007


    Original
    XRT94L33 XRT94L33 led cross reference 0x0382 0x1151 GR-253-CORE XRT94L33IB 0X176C 0x1738 PDF

    0XN307

    Abstract: B6S1 GR-253-CORE XRT86SH328 bipolar ROM M13s
    Text: PRELIMINARY XRT86SH328 28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET JANUARY 2007 GENERAL DESCRIPTION The XRT86SH328 is an integrated VT/TU Mapper with 28 port T1/E1 Line Interface Units. The XRT86SH328 contains integrated DS1/E1/J1 Framers for performance monitoring.


    Original
    XRT86SH328 28-CHANNEL XRT86SH328 0XN307 B6S1 GR-253-CORE bipolar ROM M13s PDF

    DMO 565 R

    Abstract: No abstract text available
    Text: xr PRELIMINARY XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - ATM ARCHITECTURAL DESCRIPTION NOVEMBER 2005 GENERAL DESCRIPTION The XRT79L71 is a single channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller and Line Interface Unit with Jitter


    Original
    XRT79L71 XRT79L71 DMO 565 R PDF

    GR-253-CORE

    Abstract: XRT94L33 XRT94L33IB led cross reference 0x0106 0x1950 574 91 256 Sts.1
    Text: XRT94L33 333-C C H A N N E L D S E S T S T O S T S S T M M A P P E R S O N E T R E G S T E R S CH HA AN NN NE EL LD DS S333///E E333///S ST TS S-111 T TO OS ST TS S-333///S ST TM M-111 M MA AP PP PE ER R ––– S SO ON NE ET TR RE EG GIIIS ST TE


    Original
    XRT94L33 XRT94L33 GR-253-CORE XRT94L33IB led cross reference 0x0106 0x1950 574 91 256 Sts.1 PDF

    LED VIPER

    Abstract: VIPER IC AU-AIS GI 312 diode transistor st 431 SDH 209 sf 118 d SF 119 D viper 504 VIPer Design Software
    Text: XRT94L31 333-C C H A N N E L D S E S T S T O S T S S T M M A P P E R S D H R E G S T E R M A P CH HA AN NN NE EL LD DS S333///E E333///S ST TS S-111 T TO OS ST TS S-333///S ST TM M-111 M MA AP PP PE ER R ––– S SD DH HR RE EG GIIIS ST TE ER RM


    Original
    XRT94L31 XRT94L31 LED VIPER VIPER IC AU-AIS GI 312 diode transistor st 431 SDH 209 sf 118 d SF 119 D viper 504 VIPer Design Software PDF

    GI 312 diode

    Abstract: VIPER IC sf 118 d SF 119 D GR-253-CORE XRT94L31 XRT94L33 XRT94L33IB TTB-10 0x1718
    Text: XRT94L31 333-C C H A N N E L D S E S T S T O S T S S T M M A P P E R S O N E T R E G S T E R M A P CH HA AN NN NE EL LD DS S333///E E333///S ST TS S-111 T TO OS ST TS S-333///S ST TM M-111 M MA AP PP PE ER R ––– S SO ON NE ET TR RE EG GIIIS ST


    Original
    XRT94L31 XRT94L33 XRT94L33 GI 312 diode VIPER IC sf 118 d SF 119 D GR-253-CORE XRT94L31 XRT94L33IB TTB-10 0x1718 PDF

    dmo 265 r

    Abstract: dmo 365 r MPC860 jtag AC16 GR-499-CORE I960 MPC860 XRT73L03 XRT74L73 XRT74L73IB
    Text: XRT74L73 PRELIMINARY 3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER OCTOBER 2003 REV. P1.0.1 GENERAL DESCRIPTION The XRT74L73 3 Channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller is designed to support ATM direct mapping and


    Original
    XRT74L73 XRT74L73 dmo 265 r dmo 365 r MPC860 jtag AC16 GR-499-CORE I960 MPC860 XRT73L03 XRT74L73IB PDF

    AD27

    Abstract: I960 XRT94L33 XRT94L33IB TTL RS232 buffer
    Text: xr XRT94L33 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET N0VEMBER 2006 REV.1.2.0. GENERAL DESCRIPTION FEATURES The XRT94L33 is a highly integrated SONET/SDH terminator designed for E3/DS3/STS-1 mapping/de-mapping functions from either the STS-3 or STM-1 data stream. The XRT94L33


    Original
    XRT94L33 XRT94L33 AD27 I960 XRT94L33IB TTL RS232 buffer PDF

    dmo 365 r

    Abstract: dmo 365 dmo 465 datasheet relay NAIS 5v 5 pin marx and generator NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L52 XRT72L52IQ
    Text: XRT72L52 TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2006 REV. 1.0.3 GENERAL DESCRIPTION The XRT72L52, Two Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream.


    Original
    XRT72L52 XRT72L52, XRT72L52 DS3-M13, dmo 365 r dmo 365 dmo 465 datasheet relay NAIS 5v 5 pin marx and generator NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L52IQ PDF

    4558AM

    Abstract: dmo 465
    Text: XRT72L52 TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2006 REV. 1.0.3 GENERAL DESCRIPTION The XRT72L52, Two Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream.


    Original
    XRT72L52 XRT72L52, XRT72L52 DS3-M13, XRT72L52IQ-F PQFP160 31-Jul-09 4558AM dmo 465 PDF

    0x1758

    Abstract: AU-AIS GR-253-CORE XRT94L33 XRT94L33IB ST VIPER application notes 0x11B3 574 91 256
    Text: XRT94L33 333-C C H A N N E L D S E S T S T O S T S S T M M A P P E R S D H R E G S T E R S CH HA AN NN NE EL LD DS S333///E E333///S ST TS S-111 T TO OS ST TS S-333///S ST TM M-111 M MA AP PP PE ER R ––– S SD DH HR RE EG GIIIS ST TE ER RS S March 2007


    Original
    XRT94L33 XRT94L33 0x1758 AU-AIS GR-253-CORE XRT94L33IB ST VIPER application notes 0x11B3 574 91 256 PDF

    ic 339

    Abstract: rele nais dmo 465 XRT74L74 XRT74L74IB MIPS 32-bit bus architecture F25 marking DMO 465 R
    Text: XRT74L74 PRELIMINARY 4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER OCTOBER 2003 REV. P1.1.1 GENERAL DESCRIPTION The XRT74L74 4 Channel, ATM UNI/PPP Physical Layer Processor with integrated DS3/E3 framing controller is designed to support ATM direct mapping and


    Original
    XRT74L74 XRT74L74 ic 339 rele nais dmo 465 XRT74L74IB MIPS 32-bit bus architecture F25 marking DMO 465 R PDF

    dmo 465

    Abstract: iC 458 datasheet relay NAIS 5v 5 pin M25-A dmo 365 dmo 365 r NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L56
    Text: áç XRT72L56 PRELIMINARY SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The Microprocessor Interface is used to configure the Framer in different operating modes and monitor the performance of the Framer. The XRT72L56, 6 Channel DS3/E3 Framer is designed to accept “User Data” from the Terminal


    Original
    XRT72L56 XRT72L56, XRT72L56 dmo 465 iC 458 datasheet relay NAIS 5v 5 pin M25-A dmo 365 dmo 365 r NAIS 210 RELAY NAIS Relay 5v DS3-M13 PDF

    Untitled

    Abstract: No abstract text available
    Text: áç XRT72L50 PRELIMINARY SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.3 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.


    Original
    XRT72L50 XRT72L50, XRT72L50 DS3-M13, PDF

    Rx1302

    Abstract: r4363 dmo 265
    Text: áç XRT72L50 PRELIMINARY SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.


    Original
    XRT72L50 XRT72L50, XRT72L50 DS3-M13, Rx1302 r4363 dmo 265 PDF

    IN134

    Abstract: ic 393 datasheet relay NAIS 5v 5 pin 74hct00 dmo 365 r NAIS 210 RELAY NAIS Relay 5v t90 series 0X13 DS3-M13
    Text: áç XRT72L52 PRELIMINARY TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.3 GENERAL DESCRIPTION The XRT72L52, 2 Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.


    Original
    XRT72L52 XRT72L52, XRT72L52 DS3-M13, IN134 ic 393 datasheet relay NAIS 5v 5 pin 74hct00 dmo 365 r NAIS 210 RELAY NAIS Relay 5v t90 series 0X13 DS3-M13 PDF

    Relay NAIS Ds

    Abstract: E3252 SG 2368 ATA 2388 ic 393 NAIS tf relay tes 5-2422
    Text: áç XRT72L50 SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2003 REV. 1.2.1 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an inbound DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the user data.


    Original
    XRT72L50 XRT72L50, XRT72L50 DS3-M13, XRT72L50IQ-F PQFP100 01-Aug-09 Relay NAIS Ds E3252 SG 2368 ATA 2388 ic 393 NAIS tf relay tes 5-2422 PDF

    dmo 365 rn

    Abstract: DMO36 dmo 365 r IC TX 434 HDB3 AMI ENCODER DECODER t90 series DS3-M13 XRT7250 XRT7250IQ difference between 8051 and 8052 microcontroller
    Text: áç XRT7250 PRELIMINARY DS3/E3 FRAMER IC MARCH 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer


    Original
    XRT7250 XRT7250 DS3-M13, dmo 365 rn DMO36 dmo 365 r IC TX 434 HDB3 AMI ENCODER DECODER t90 series DS3-M13 XRT7250IQ difference between 8051 and 8052 microcontroller PDF

    dmo 365 r

    Abstract: ATA 2388 dmo 265 r datasheet relay NAIS 5v 5 pin marx and generator IC ATA 2388 RELAY AG 105 21 Esart NAIS 210 RELAY DS3-M13
    Text: áç XRT72L50 SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2003 REV. 1.2.1 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an inbound DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the user data.


    Original
    XRT72L50 XRT72L50, XRT72L50 DS3-M13, dmo 365 r ATA 2388 dmo 265 r datasheet relay NAIS 5v 5 pin marx and generator IC ATA 2388 RELAY AG 105 21 Esart NAIS 210 RELAY DS3-M13 PDF

    dmo 365 r

    Abstract: DMO 365 IC XD 5252 F NAIS 210 RELAY deal marx TTB-11 datasheet relay NAIS 5v 5 pin 5v relay nais 5 pin data sheet DS3-M13 XRT72L52
    Text: xr XRT72L52 TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER FEBRUARY 2005 REV. 1.0.1 GENERAL DESCRIPTION The XRT72L52, Two Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream. Further, the Framer is also designed to receive an inbound DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the user data.


    Original
    XRT72L52 XRT72L52, XRT72L52 DS3-M13, dmo 365 r DMO 365 IC XD 5252 F NAIS 210 RELAY deal marx TTB-11 datasheet relay NAIS 5v 5 pin 5v relay nais 5 pin data sheet DS3-M13 PDF

    dmo 265 r

    Abstract: t59b
    Text: xr XRT72L50 SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER MAY 2003 REV. 1.2.0 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an inbound DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the user data.


    Original
    XRT72L50 XRT72L50, XRT72L50 DS3-M13, XRT72LCorporation dmo 265 r t59b PDF

    r4363

    Abstract: CP Clare RELAY dmo 465 IC 404
    Text: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.6 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields


    Original
    XRT72L53 XRT72L53, XRT72L53 DS3-M13, r4363 CP Clare RELAY dmo 465 IC 404 PDF

    URG 30100

    Abstract: rur 450 UR810 IC p815 UR1520 P3020 ruru100 URP1560 RD6120 UR840
    Text: HARRIS ULTRA-FAST RECOVERY RECTIFIER PRODUCT LINE & V R U R D 410 R U R D 610 R U R D 410S R URD610S 6 0 n s 1.5V RURD460 1.5 V 60ns 1 5V 3 5 n s 1.0 V 6 0 n s 1.5 V M ÜR815 R U R P815 M UR820 RURP820 3 5 n s 1.0V M UR1520 R U R P1520 35ns+ 1 .0 5 V 3 5 n s


    OCR Scan
    O-251 O-252 T0-247 O-218 URD610S UR810 P3010 RURP3015 P3020 RURP3040 URG 30100 rur 450 IC p815 UR1520 ruru100 URP1560 RD6120 UR840 PDF