Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98431 10/100 Mbps Ethernet TM CONTROLLER DESCRIPTION The µPD98431 is a 10/100 Mbps Ethernet controller having eight Media Access Control MAC ports conforming to IEEE 802.3 and IEEE 802.3u. Each port can store 1 packet of receive data since each port has a 2 KB receive FIFO. This can reduce the
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PD98431
PD98431
32-bit
64-bit
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mlt3-to-nrzi
Abstract: LF8221 HFBR-5103T BP45B DM9101F 100BASE-FX YCL Electronics rj45 YCL Electronics LAN magnetic
Text: PRELIMINARY Am79C873 NetPHY -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support DISTINCTIVE CHARACTERISTICS • 100BASE-FX direct interface to industry standard electrical/optical transceivers ■ 10/100BASE-TX physical-layer, single-chip
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Am79C873
100BASE-FX
10/100BASE-TX
100BASE-TX
X3T12
mlt3-to-nrzi
LF8221
HFBR-5103T
BP45B
DM9101F
YCL Electronics rj45
YCL Electronics LAN magnetic
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IR10D
Abstract: RPS_PRES HY514264 R1799-2 TPI-10 74f04d 980b bergstik ARB12 mst12
Text: LXD980/980B Reference Design Schematics Reference Design Schematics Reference Design Schematic, Sheet 1:LXD 980 Top Level Schematic D-1 LXD980/980B Reference Design Users Guide Reference Design Schematic, Sheet 2:Raptor1 1 2 IR10DAT IR10CLK IR10ENA IR10DEN
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LXD980/980B
IR10DAT
IR10CLK
IR10ENA
IR10DEN
ISOLATE10
IR10COL
IR10CFS
BPIR100CFS
IR10D
RPS_PRES
HY514264
R1799-2
TPI-10
74f04d
980b
bergstik
ARB12
mst12
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SMC91C111
Abstract: mjab LAN91C111-NC LAN91C111I-NS LAN91C111I-NU SINGLE CHIP INVERTER WITH INTEGRATED DRIVER 128-PIN 683XX LAN91C111 LAN91C111-NS
Text: LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY PRODUCT FEATURES Datasheet Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet Supports Burst Data Transfer
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LAN91C111
LAN91C111
SMC91C111
mjab
LAN91C111-NC
LAN91C111I-NS
LAN91C111I-NU
SINGLE CHIP INVERTER WITH INTEGRATED DRIVER
128-PIN
683XX
LAN91C111-NS
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LAN91C110-PU
Abstract: winbond ethernet COL100 LAN9000 LAN91C110 smsclan91c110
Text: LAN91C110 REV. B FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications Product Features Dual Speed CSMA/CD Engine 10 Mbps and 100 Mbps Built-in Transparent Arbitration for Slave Sequential Access Architecture Compliant with IEEE 802.3 100BASE-T
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LAN91C110
16-Bit
100BASE-T
100BASE-TX,
100BASE-T4
IEEE-802
LAN91C110-PU
winbond ethernet
COL100
LAN9000
smsclan91c110
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Inter-ICs
Abstract: chn 940 S1C33L01 1431T dot led display large size with circuit diagram YUV411 i781symbol LUT43 S1C33L19 786LCD
Text: S1C33L19 Technical Manual CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33L19 Technical Manual S1C33L19 Technical Manual SEMICONDUCTOR OPERATIONS DIVISION EPSON Electronic Devices Website http://www.epson.jp/device/semicon_e Document code: 411664200 April 2009 in JAPAN D
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S1C33L19
32-BIT
S1C33L19
Inter-ICs
chn 940
S1C33L01
1431T
dot led display large size with circuit diagram
YUV411
i781symbol
LUT43
786LCD
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S1C33L17
Abstract: S1C33L17D S1C33L17F Inter-ICs dot led display large size with circuit diagram LOT code stmicroelectronics S1C33L01 S1C33L17B 2451c BT 342 project
Text: S1C33L17 Technical Manual CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33L17 Technical Manual S1C33L17 Technical Manual SEMICONDUCTOR OPERATIONS DIVISION EPSON Electronic Devices Website http://www.epson.jp/device/semicon_e Document code: 411520600 Fist issue June, 2008 C B
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S1C33L17
32-BIT
S1C33L17
S1C33L17D
S1C33L17F
Inter-ICs
dot led display large size with circuit diagram
LOT code stmicroelectronics
S1C33L01
S1C33L17B
2451c
BT 342 project
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bv228
Abstract: S1C33210 S1C33L01 MF1517-01 CP4D
Text: MF1517-01 CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33210 Technical Manual S1C33210 PRODUCT PART S1C33210 FUNCTION PART NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
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MF1517-01
32-BIT
S1C33210
S1C33210
imEH54
bv228
S1C33L01
MF1517-01
CP4D
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SMC91C111
Abstract: LAN91C111 mjab
Text: LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY Datasheet Product Features Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet Supports Burst Data Transfer 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers
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LAN91C111
LAN91C111
SMC91C111
mjab
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mjab
Abstract: SMC91C111
Text: LAN91C111 ADVANCED INFORMATION 10/100 Non-PCI Ethernet Single Chip MAC + PHY FEATURES Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers Enhanced Power Management Features
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LAN91C111
IEEE802
mjab
SMC91C111
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A1A15
Abstract: No abstract text available
Text: LAN91C100FD REV. C PRELIMINARY FEAST Fast Ethernet Controller with Full Duplex Capability FEATURES ! ! ! ! ! ! ! ! Dual Speed CSMA/CD Engine 10 Mbps and 100 Mbps Compliant with IEEE 802.3 100BASE-T Specification Supports 100BASE-TX, 100BASE-T4, and 10BASE-T Physical Interfaces
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LAN91C100FD
100BASE-T
100BASE-TX,
100BASE-T4,
10BASE-T
A1A15
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18Oi
Abstract: 1413C LAN91C111-REV
Text: LAN91C111 10/100 Non-PCI Ethernet Single Chip MAC + PHY PRODUCT FEATURES Datasheet Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet Supports Burst Data Transfer
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LAN91C111
LAN91C111)
18Oi
1413C
LAN91C111-REV
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Untitled
Abstract: No abstract text available
Text: LAN91C111 ADVANCED INFORMATION 10/100 Non-PCI Ethernet Single Chip MAC + PHY FEATURES Single Chip Ethernet Controller Dual Speed - 10/100 Mbps Fully Supports Full Duplex Switched Ethernet 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers Enhanced Power Management Features
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LAN91C111
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chilled water system
Abstract: No abstract text available
Text: Data Sheet, Revision 3 September 21, 2005 TSI-2 2k x 2k Time-Slot Interchanger 1 Introduction The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page 61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text
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condit138
DS05-116STSI-3
DS05-116STSI-2)
chilled water system
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VC5471
Abstract: No abstract text available
Text: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 – Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
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TMS320VC5471
SPRS180C
VC5471
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y12 t 953
Abstract: TC9205M 100/1000 gigabit Integrated Switch with PHY GMII VLAN Tag TC9205M-DS-R03 Ethernet Switch Controller TC9205 Tc9025
Text: TC9205M Preliminary Data Sheet 5-Port 10/100/1000 Smart Ethernet Switch This feature allows improved multimedia applications. Features Stand Alone Switch On A Chip 5 Ethernet 10/100/1000 ports I Ethernet 10/100 port MII/GMII interface for 5 ports I extra MII interface for 6th port
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TC9205M
TC9205M-DS-R03
y12 t 953
TC9205M
100/1000 gigabit Integrated Switch with PHY
GMII VLAN Tag
TC9205M-DS-R03
Ethernet Switch Controller
TC9205
Tc9025
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Untitled
Abstract: No abstract text available
Text: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 - Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
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TMS320VC5471
SPRS180C
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ICS1890
Abstract: ICS1889
Text: ICS1890 Integrated Circuit Systems, Inc. 10Base-T/100Base-TX Integrated PHYceiver General Description The ICS1890 is a fully integrated physical layer device supporting 10 and 100Mb/s CSMA/CD Ethernet applications. DTE adapter cards or motherboards , switching hub, repeater
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ICS1890
10Base-T/100Base-TX
ICS1890
100Mb/s
ICS1889
ICS1889
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RXD55
Abstract: RXD26
Text: Hardware Design Guide June 2004 STSI-144 Scalable Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. scalable time-slot interchanger STSI-144 device. Information relevant to the use of
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STSI-144
STSI-144)
DS04-230SWCH
DS04-168SWCH
DS04-214SWCH)
RXD55
RXD26
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Untitled
Abstract: No abstract text available
Text: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33301 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any
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32-BIT
S1C33301
E-08190
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Hy4C
Abstract: No abstract text available
Text: TNETE2004 SINGLE-CHIP QuadPHY FOUR 10 BASE-T PHYSICAL LAYER INTERFACES S P W S 023- OCTOBER 1996 S ing le-C hip M u lt i-P H Y Solution: L o o p b a c k M o d e f or T e s t O p e r a t i o n s - Integrated M an ch es ter E n co din g/D e co din g F o u r 10 B a s e - T P h y s i c a l L a y e r I n t e r f a c e s
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TNETE2004
20-Mbps
Hy4C
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Untitled
Abstract: No abstract text available
Text: ¡iii ICS K_i_^Bp*iBTjj lU fT O I 3 ICS1889 Integrated C ircuit System s, Inc. Advance Information 100Base-FX Integrated PHYceiver TM Features General Description The ICS1889 is a fully integrated physical layer device sup porting 100 Megabits per second CSMA/CD Fast Ethernet
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ICS1889
100Base-FX
ICS1889
100Base-FX.
E57Sfl
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY z i Advanced Micro Devices Am79C982 basic Integrated Multiport Repeater frIMR DISTINCTIVE CHARACTERISTICS • Fully backward compatible with existing IMR/IMR+ device non-managed hub designs — Pin/socket compatible with the Am79C980 (IMR) and Am79C981 (IMR+) devices
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Am79C982
Am79C980
Am79C981
10BASE-T
10BASE5
10BASE2
10BASE-F
10BASE-T
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GSM jamming scheme generator
Abstract: "IEEE 802.3" "Clause 27" BRXD12 BTXD02 APAA LUC3R04 S5241 OXCO LUC3S02 BTXD10
Text: Preliminary Data Sheet July 1997 microelectronics group Lucent Technologies Bell Labs Innovations LUC3R04 10/100 Mbits/s Managed Repeater CMOS Integrated Circuit Features • Four single repeaters per chip allow for port mobil ity repeater designs similar to those based on the
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LUC3R04
ATT1RX04.
100Base-TX,
LUC3S02
005002b
208-Pin
LUC3R04-FC
GSM jamming scheme generator
"IEEE 802.3" "Clause 27"
BRXD12
BTXD02
APAA
LUC3R04
S5241
OXCO
BTXD10
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