Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com • • • • • • • • • • • Fabricated in Advanced 130-nm CMOS Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0) RCLK RD(31.0)

Contextual Info: Preliminary Data Sheet August 1998 microelectronics group Lucent Technologies Bell Labs Innovations TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger Features Applications • Thirty-two full-duplex, serial time-division multi­ plexed TDM highways.

SMD codes

Abstract: 063310
Contextual Info: QuadPHY 10GX ASSP Telecom Standard Product Data Sheet Released PM8358 QuadPHY® 10GX 4 X 1.2 to 3.2 Gbit/s Quad, Fully Redundant, XAUI to XGMII, 10 Gigabit Ethernet / Fibre Channel Physical Layer Device Data Sheet Released Issue No. 5: April 2004 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

sony rxd7

Abstract: w1p13 XMT 2315 8B10B RXD14 3156 00010001
Contextual Info: 8101 8101 Gigabit Ethernet Controller 99110 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access

JI32

Abstract: SAB-C161JI-LF sab-c161cs-lf bosch ac drive C161CS C161JC C166 J1850 TTL catalog c161jc32
Contextual Info: Da ta S h e e t , V 3 .0 , J a n . 2 0 0 1 C161CS-32R/-L C161JC-32R/-L C161JI-32R/-L 16-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . Edition 2001-01 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

chilled water system

Contextual Info: Data Sheet, Revision 3 September 21, 2005 TSI-2 2k x 2k Time-Slot Interchanger 1 Introduction The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page 61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text

sony rxd7

Contextual Info: S O N Y C XD1700 E thernet S w itch Features: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Fully Integrated Ethernet Switch On A Chip Twenty Four 10Base-X Ports, Two 10/100Base-X Ports All Ports can be either Full or Half Duplex Low Per-Port Cost

TK3723

Contextual Info: TLK2541 www.ti.com. SLLS779B – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps

RXD26

Abstract: circuit diagram for speed checker for highways
Contextual Info: Advisory June 2003 TTSI4K32T, TTSI2K32T, and TTSI1K16T 4096-Channel, 32-Highway Time-Slot Interchanger Introduction This document describes a technical issue that is known to exist with the device. Issue Version 1 TTSI4K32T, TTSI2K32T, and TTSI1K16T Duty Cycle and Jitter Sensitivity on the CK Pin

net eN8

Abstract: TDN01 crpa 8B10B P802 TLK3118 XGXS quad video processor
Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com SLLS628C – DECEMBER 2004 – REVISED APRIL 2007 • • • • • • • • • • • Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0)

RXD55

Abstract: RXD26
Contextual Info: Hardware Design Guide June 2004 STSI-144 Scalable Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. scalable time-slot interchanger STSI-144 device. Information relevant to the use of

highway speed checker

Abstract: highway speed checker application only SPEED CHECKER FOR HIGHWAY highway speed checker circuit diagram highway speed checker block diagram
Contextual Info: Data Sheet December 2004 TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger Features „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ Thirty-two full-duplex, serial time-division multiplexed TDM highways. Full availability, nonblocking 4096-channel time/

TS127 08

Abstract: RXD55 RXD01 txd45 RXD4-8 RXD35 TSI-16 RXD26 TXD38 TXD37
Contextual Info: Advance Information May 2003 TSI-16 Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. TSI-16 device. Information relevant to the use of the device in a board design is covered. Ball descriptions, dc electrical characteristics,

K297

Abstract: net eN8 TDN01
Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com SLLS628C – DECEMBER 2004 – REVISED APRIL 2007 • • • • • • • • • • • Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0)

circuit diagram for speed checker for highways

Abstract: highway speed checker block diagram highway speed checker highway speed checker application only TTSI2K32T Agere 217 PBGA LTXD e3 multiport injection TTSI4K32T3BAL TTS12K32T
Contextual Info: Preliminary Data Sheet February 1999 TTS12K32T 2048-Channel, 32-Highway Time-Slot Interchange Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Thirty-two full-duplex, serial time-division multiplexed TDM highways.

Contextual Info: TLK2541 www.ti.com. SLLS779A – JANUARY 2008 – REVISED APRIL 2008 1 TO 2.6 GBPS TRANSCEIVER FEATURES 1 • 1 to 2.6 Gigabits Per Second Gbps

highway speed checker block diagram

Abstract: highway speed checker circuit diagram highway speed checker random pattern generator TTSI2K32T highway speed checker application only
Contextual Info: Data Sheet December 2004 TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger Features „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ Thirty-two full-duplex, serial time-division multiplexed TDM highways. Full availability, nonblocking 2048-channel time/

tts14

Contextual Info: Preliminary Data Sheet August 1998 microelectronics group Lucent Technologies Bell Labs Innovations TTSI4K32T 4096-Channel, 32-Highway Time-Slot Interchanger Features Applications • Thirty-two full-duplex, serial time-division multi­ plexed TDM highways.

D3318

Contextual Info: 8101/8104 Gigabit Ethernet Controller Technical Manual November 2000 Order Number R14017.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

RXD29

Abstract: D3318 216520-4 8B10B ansi encoder
Contextual Info: 8101/8104 Gigabit Ethernet Controller Technical Manual February 2001 Order Number R14017.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

MC9S12GRMV1

Abstract: MC9S12G128 MC9S12G48 MC9S12G64 amp07 MC9S12GN16 PS5 1020 PJ70 diode 9S12G128 MC9S12G96
Contextual Info: MC9S12G Family Reference Manual S12 Microcontrollers MC9S12GRMV1 Rev. 0.41 October 18, 2010 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information

prbs parity checker and generator

Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com • • • • • • • • • • • Fabricated in Advanced 130-nm CMOS Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0) RCLK RD(31.0)

RXD24

Abstract: TXD27 RXD29 RXD-26 RXD16 RXD19 TXD28 RXD26 8B10B RXD25
Contextual Info: 8100 8100 Technology Incorporated Gigabit Ethernet Media Access Controller with 8B10B Encoder/Decoder MAC + 8B10B PCS May 30, 1997 TRUNCATED DATA SHEET Note: Check for latest Data Sheet revision before starting any designs. Call SEEQ Technology (510) 226-2910

TXD27

Abstract: L-TTSI008321BL-2-DB TS242 u3 16,384 Mhz
Contextual Info: Hardware Design Guide, Revision 1 November 2, 2005 TSI-8 8K x 8K Time-Slot Interchanger 1 Introduction The last issue of this data sheet was May, 2002 This document was previously labeled Advance Information. A change history is included in 9 Change History on page 25.