DNA SMD MARKING CODE
Abstract: DNA MARKING CODE AN246 Transmission Lines and Terminations with Philips Advanced Logic Families philips Semiconductor Integrated Circuit Data Catalog Philips Logic Marking Code smd diode y3
Text: INTEGRATED CIRCUITS 74LVT08 3.3V Quad 2-input AND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 May 29 Philips Semiconductors Product specification 3.3V Quad 2-input AND gate 74LVT08 QUICK REFERENCE DATA SYMBOL TEST CONDITIONS Tamb = 25°C; GND = 0V
|
Original
|
PDF
|
74LVT08
74LVT08
14-Pin
DNA SMD MARKING CODE
DNA MARKING CODE
AN246
Transmission Lines and Terminations with Philips Advanced Logic Families
philips Semiconductor Integrated Circuit Data Catalog
Philips Logic Marking Code
smd diode y3
|
74ABT08
Abstract: 74ABT 74ABT08PW SA00363
Text: INTEGRATED CIRCUITS 74ABT08 Quad 2-input AND gate Product specification IC23 Data Handbook Philips Semiconductors 1995 Sep 18 Philips Semiconductors Product specification Quad 2-input AND gate 74ABT08 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS
|
Original
|
PDF
|
74ABT08
74ABT08
74ABT
74ABT08PW
SA00363
|
Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Product specification 3.3V Quad 2-input AND gate 74LVT08 QUICK REFERENCE DATA SYMBOL TEST CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.0 3.4 ns tPLH tPHL Propagation delay An or Bn to Yn CL = 50pF; VCC = 3.3V CIN Input capacitance
|
Original
|
PDF
|
74LVT08
14-Pin
74LVT08
74LVT08PW
|
74LVT08
Abstract: 74LVT 74LVT08PW
Text: INTEGRATED CIRCUITS 74LVT08 3.3V Quad 2-input AND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 May 29 Philips Semiconductors Product specification 3.3V Quad 2-input AND gate 74LVT08 QUICK REFERENCE DATA SYMBOL TEST CONDITIONS Tamb = 25°C; GND = 0V
|
Original
|
PDF
|
74LVT08
14-Pin
74LVT08
74LVT
74LVT08PW
|
Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Product specification Quad 2-input AND gate 74ABT08 QUICK REFERENCE DATA SYMBOL PARAMETER tpLH tpHL Propagation delay An or Bn to Yn LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = 0V TYRCAL 2.4 1.9 CL = 50pF; VCC = 5V UNIT A1 B1 4 5 10
|
OCR Scan
|
PDF
|
74ABT08
SQT402-1
MO-153
711005b
00Tbfl7b
|
Untitled
Abstract: No abstract text available
Text: Product specification Philips Semiconductors 3.3V Quad 2-input AND gate 74LVT08 QUICK REFERENCE DATA TEST CONDITIONS Tamb = 25 C; GND » OV PARAMETER SYMBOL Propagation delay An or Bn to Yn tp L H tp H L TYPICAL C u = 50pF; VCC = 3-3V UNTT 3.0 3.4 C |N Input capacitance
|
OCR Scan
|
PDF
|
74LVT08
14-Pln
14-Rn
14-Pin
74LVT08
74LVT08PW
|
