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    MO-211

    Abstract: SN74AUC1G00 DCK R-PDSO-G5 Package A115-A C101 R-PDSO-G5 Package
    Text: SN74AUC1G00 SINGLE 2ĆINPUT POSITIVEĆNAND GATE SCES368J – SEPTEMBER 2001 – REVISED DECEMBER 2002 D Available in the Texas Instruments D D D D D D D D DBV OR DCK PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V


    Original     		PDF SN74AUC1G00 SCES368J 000-V A114-A) A115-A) MO-211 SN74AUC1G00 DCK R-PDSO-G5 Package A115-A C101 R-PDSO-G5 Package

    SN74AUCH16245

    Abstract: TOP SIDE MARKING P5 54 fk SOT-23 Analog Marking Information SN74 cd4000 sot-23 Marking pah sot-23 Marking pcf 1D2 SOT-23 LVC - Low-Voltage BiCMOS Technology marking H6 sot 23
    Text: AUC Advanced UltraĆLowĆVoltage CMOS Data Book January 2003 Logic Products General Information AUC Single Gates AUC Widebus AUC Widebus+ Application Reports Mechanical Data AUC Advanced Ultra-Low-Voltage CMOS Data Book Printed on Recycled Paper IMPORTANT NOTICE


    Original     		PDF condi655303 4204151-2/B MO-211 SN74AUCH16245 TOP SIDE MARKING P5 54 fk SOT-23 Analog Marking Information SN74 cd4000 sot-23 Marking pah sot-23 Marking pcf 1D2 SOT-23 LVC - Low-Voltage BiCMOS Technology marking H6 sot 23