A115-A
Abstract: C101 SN74AUC00
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC00
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Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 10 3B 9 3A 6 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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A115-A
Abstract: C101 SN74AUC00
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC00
|
Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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ms00 marking
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
ms00 marking
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A115-A
Abstract: C101 SN74AUC00
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC00
|
A115-A
Abstract: C101 SN74AUC00
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC00
|
Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
|
SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC00
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
|
SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC00
|
Untitled
Abstract: No abstract text available
Text: SN74AUC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES510A – NOVEMBER 2003 – REVISED MARCH 2005 FEATURES • VCC 1 14 2 13 4B 3 12 4A 4 11 4Y 5 6 10 3B 9 3A 7 8 3Y • • • • • 1B 1Y 2A 2B 2Y 1A • RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC00
SCES510A
000-V
A114-A)
A115-A)
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