A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER TOP-SIDE MARKING H2 SU864D
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
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Original
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PDF
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SN74SSTU32864D
25-BIT
SCES623A
14-Bit
A115-A
C101
SN74SSTU32864D
SN74SSTU32864DGKER
TOP-SIDE MARKING H2
SU864D
|
Untitled
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
|
Untitled
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
|
Untitled
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
|
Untitled
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
|
Untitled
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
|
A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER SSTL-18
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
A115-A
C101
SN74SSTU32864D
SN74SSTU32864DGKER
SSTL-18
|
A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
A115-A
C101
SN74SSTU32864D
SN74SSTU32864DGKER
|
SSTL18
Abstract: No abstract text available
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
SSTL18
|
A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER
Text: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout
|
Original
|
PDF
|
SN74SSTU32864D
25-BIT
SCES623A
14-Bit
A115-A
C101
SN74SSTU32864D
SN74SSTU32864DGKER
|