AD5604
Abstract: No abstract text available
Text: Fully Accurate, 12-/14-/16-Bit VOUT nanoDAC, Quad, SPI Interface, 4.5 V to 5.5 V in TSSOP Data Sheet AD5024/AD5044/AD5064 FEATURES FUNCTIONAL BLOCK DIAGRAMS VREFIN VDD AD5064-1 LDAC INTERFACE LOGIC AND SHIFT REGISTER SYNC DIN DAC REGISTER INPUT REGISTER DAC
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12-/14-/16-Bit
AD5666
14-/16-lead
AD5024/AD5044/AD5064
AD5064-1
14-lead
AD5604
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LFSR COUNTER
Abstract: 1969 fairchild X5801 XC3000 XC4000 XC4000E XC4010E 145146 74 XOR GATE math polynomials
Text: Efficient Shift Registers, LFSR Counters, and Long PseudoRandom Sequence Generators August 1995 Application Note By PETER ALFKE Summary Shift registers longer than eight bits can be implemented most efficiently in XC4000E RAM. Using Linear Feedback Shift-Register LFSR counters to address the RAM makes the design even simpler. This application note describes
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XC4000E
32-bit
100-bit
001xxx-xx
LFSR COUNTER
1969 fairchild
X5801
XC3000
XC4000
XC4010E
145146
74 XOR GATE
math polynomials
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DB14N
Abstract: AD5570 68HC11 AD845 OP177
Text: True Accuracy, 16-Bit ±12 V/±15 V, Serial Input Voltage Output DAC AD5570 FEATURES FUNCTIONAL BLOCK DIAGRAM VSS VDD DGND AD5570 POWER-ON RESET REFGND 2R 16-BIT DAC VOUT AGND R AGNDS R DAC REGISTER REFIN POWER-DOWN CONTROL LOGIC SHIFT REGISTER LDAC SDIN SCLK
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16-Bit
AD5570
16-bit
version/-40
16-Lead
DB14N
AD5570
68HC11
AD845
OP177
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DB14N
Abstract: ad5560 AD5570 AD7895-10 op177 68HC11 AD845
Text: True Accuracy, 16-Bit ±12 V/±15 V, Serial Input Voltage Output DAC AD5570 FEATURES FUNCTIONAL BLOCK DIAGRAM VSS VDD DGND AD5570 POWER-ON RESET REFGND 2R 16-BIT DAC VOUT AGND R AGNDS R DAC REGISTER REFIN POWER-DOWN CONTROL LOGIC PD SHIFT REGISTER LDAC SDIN
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16-Bit
AD5570
16-bit
version/-40
16-Lead
DB14N
ad5560
AD5570
AD7895-10
op177
68HC11
AD845
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J11-A
Abstract: RS16
Text: True Accuracy, 16-Bit ±12 V/±15 V, Serial Input Voltage Output DAC AD5570 FUNCTIONAL BLOCK DIAGRAM FEATURES VSS VDD DGND AD5570 POWER-ON RESET REFGND 2R 16-BIT DAC VOUT AGND R AGNDS R DAC REGISTER REFIN POWER-DOWN CONTROL LOGIC PD SHIFT REGISTER LDAC SDIN
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16-Bit
AD5570
16-bit
16-Lead
J11-A
RS16
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verilog code 16 bit LFSR
Abstract: vhdl code for pn sequence generator vhdl code for pn sequence generator using lfsr vhdl code PN code generator vhdl code for cdma verilog hdl code for LINEAR BLOCK CODE vhdl code 16 bit LFSR pn sequence generator vhdl pn sequence generator verilog code vhdl code 4 bit LFSR
Text: Applications - S o f t w a re HDL Coding for PSEUDO-RANDOM Noise Generators Inferring Virtex SRL macros results in extremely efficient Linear Feedback Shift Register implementations. by Mike Gulotta, Field Application Engineer, Xilinx, mike.gulotta@xilinx.com
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8 shift register by using D flip-flop
Abstract: verilog code 5 bit LFSR shift register by using D flip-flop shift register coding vhdl code 8 bit LFSR digital FIR Filter verilog code shift register verilog code 8 bit LFSR vhdl code for complex multiplication and addition vhdl code direct digital synthesizer
Text: Shift Register RAM-Based (ALTSHIFT_TAPS) Megafunction User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Document Version: Document Date: 2.0 July 2008 Copyright 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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cp245
Abstract: True 18-Bit, Voltage Output DAC AD57801
Text: System Ready, 18-Bit ±1 LSB INL, Voltage Output DAC AD5780 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC SDIN SYNC SDO VREFP AD5780 IOVCC SCLK VDD A1 CLR RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC 18 18 DAC REG 18-BIT DAC VOUT 6kΩ LDAC RESET R1 RFB
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18-bit
18-Bit
AD5780
AD5780ACPZ
AD5780ACPZ-REEL7
AD5780BCPZ
AD5780BCPZ-REEL7
EVAL-AD5780SDZ
cp245
True 18-Bit, Voltage Output DAC
AD57801
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Untitled
Abstract: No abstract text available
Text: True 18-Bit, Voltage Output DAC ±0.5 LSB INL, ±0.5 LSB DNL AD5781 FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VREFPF VREFPS AD5781 IOVCC SDIN SCLK SDO A1 6.8kΩ 6.8kΩ R1 RFB RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC SYNC 18 DAC REG 18 18-BIT DAC VOUT 6kΩ
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18-Bit,
AD5781
18-bit
20-lead
instrumenta19
MO-153-AC
RU-20)
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AD8676
Abstract: No abstract text available
Text: 1 ppm, 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791-EP Enhanced Product FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VREFPF VREFPS VDD AD5791-EP IOVCC A1 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 20 DAC REG 20-BIT
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20-Bit,
20-lead
AD5791-EP
20-BIT
MO-153-AC
RU-20)
AD5791SRU-EP
AD8676
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Untitled
Abstract: No abstract text available
Text: System Ready, 20-Bit, ±2LSB INL, Voltage Output DAC AD5790 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VDD VREFP A1 IOVCC 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ LDAC
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20-bit
20-Bit,
AD5790
CP-24-5)
AD5790BCPZ
AD5790BCPZ-RL7
EVAL-AD5790SDZ
24-Lead
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Untitled
Abstract: No abstract text available
Text: System Ready, 18-Bit ±1 LSB INL, Voltage Output DAC AD5780 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VCC SDIN SYNC SDO VREFP AD5780 IOVCC SCLK VDD A1 CLR RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC 18 18 DAC REG 18-BIT DAC VOUT 6kΩ LDAC RESET R1 RFB
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18-bit
18-Bit
AD5780
AD5780BCPZ-REEL7
EVAL-AD5780SDZ
24-Lead
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Untitled
Abstract: No abstract text available
Text: 1 ppm, 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791-EP Enhanced Product FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VDD VREFPF VREFPS AD5791-EP IOVCC A1 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 20 DAC REG 20-BIT
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20-Bit,
AD5791-EP
20-BIT
20-lead
MO-153-AC
RU-20)
AD5791SRU-EP
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ad5791
Abstract: AD8675 2SC SERIES ADA4004-2 ADA4898-1 AD8676 ADA4004-1 ADA4004-3 AD867
Text: True 18-Bit, Voltage Output DAC ±0.5 LSB INL, ±0.5 LSB DNL AD5781 FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VREFPF VREFPS AD5781 IOVCC SDIN SCLK SDO A1 6.8kΩ 6.8kΩ R1 RFB RFB INV INPUT SHIFT REGISTER AND CONTROL LOGIC SYNC 18 DAC REG 18 18-BIT DAC VOUT 6kΩ
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18-Bit,
AD5781
18-BIT
18-bit
MO-153-AC
20-Lead
RU-20)
AD5781BRUZ
AD5781BRUZ-REEL7
ad5791
AD8675
2SC SERIES
ADA4004-2
ADA4898-1
AD8676
ADA4004-1
ADA4004-3
AD867
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Untitled
Abstract: No abstract text available
Text: 1 ppm, 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791-EP Enhanced Product FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VDD VREFPF VREFPS AD5791-EP IOVCC A1 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 20 DAC REG 20-BIT
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20-Bit,
AD5791-EP
20-BIT
20-lead
MO-153-AC
RU-20)
AD5791SRU-EP
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Untitled
Abstract: No abstract text available
Text: 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VDD VCC VREFPF VREFPS AD5791 IOVCC A1 6.8kΩ 6.8kΩ R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ
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20-Bit,
AD5791
20-BIT
20-lead
MO-153-AC
RU-20)
AD5791BRUZ
AD5791ARUZ
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Untitled
Abstract: No abstract text available
Text: 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791 Data Sheet FUNCTIONAL BLOCK DIAGRAM FEATURES VCC VDD VREFPF VREFPS 6.8kΩ 6.8kΩ AD5791 IOVCC A1 R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ
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20-Bit,
AD5791
20-BIT
20-lead
MO-153-AC
RU-20)
AD5791BRUZ
AD5791ARUZ
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AD5791
Abstract: AD8676 ad5781 AD5791ARUZ transistor 2sc 18 AD797 AD845 AD8675 AD8675ARZ AD8676BRZ
Text: 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC AD5791 FEATURES FUNCTIONAL BLOCK DIAGRAM VCC VDD VREFPF VREFPS A1 R1 RFB RFB INV SDIN INPUT SHIFT REGISTER AND CONTROL LOGIC SCLK SYNC SDO 20 DAC REG 20 20-BIT DAC VOUT 6kΩ LDAC CLR POWER-ON-RESET AND CLEAR LOGIC
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20-Bit,
AD5791
20-BIT
MO-153-AC
20-Lead
RU-20)
AD5791BRUZ
AD5791ARUZ
AD5791
AD8676
ad5781
AD5791ARUZ
transistor 2sc 18
AD797
AD845
AD8675
AD8675ARZ
AD8676BRZ
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Untitled
Abstract: No abstract text available
Text: SIEMENS SDA 9251X 868352 - Bit Dynamic Sequential Access Memory for Television Applications TV - SAM CMOS IC Preliminary Data Features • 212 x 64 x 16 x 4 bit organization • Triple port architecture • One 16 x 4 bit input shift register • Two 16 x 4 bit output shift registers
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9251X
P-DSO-28-
33-MHz
27-Gbit/s
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MAX514ACWI
Abstract: No abstract text available
Text: >i/i>jxiyi/i 19-4516; Rev. O; 12/91 CMOS Quad, 12-Bit, S erial-Input M ultiplying DAC _ G eneral D escription The MAX514 contains four 12-bit R-2R m ultiplying digital-to-analog converters DACs , each with a serial-in parallel-out shift register, a DAC register, and control
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12-Bit,
12-Bit
24-Pin
28-Pin
MAX514
MAX514ACWI
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MAX514BCNG
Abstract: MAX514ACWI
Text: 19-4516; Rev 1:2197 CMOS Quad, 12-Bit, Serial-Input M ultiplying DAC The MAX514 contains four 12-bit R-2R multiplying digital-to-analog converters DACs , each with a serial-in parallel-out shift register, a DAC register, and control logic. The MAX514’s 3-wire serial interface design mini
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12-Bit,
MAX514
12-bit
MAX514BCNG
MAX514ACWI
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MAX543ACWE
Abstract: MAX543BCSA MAX543 MAX543ACPA MAX543ACSA MAX543AEPA MAX543BCPA MAX543BCWE 8085 timing diagram for Call on positive instruction 8085 advantages
Text: yi/iyjxi>i/i 19-1972; Rev 1; 10/92 CMOS, 12-Bit, Serial-Input M ultiplying DAC _ Features ♦ ♦ ♦ ♦ ♦ The MAX543 contains a 12-bit R-2R type DAC, a serial-in parallel-out shift register, a DAC register and control logic. On the rising e dge of the clo ck CLK pulse, the
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12-Bit,
MAX543
16-pin
12-bit
MS-001
MAX543ACWE
MAX543BCSA
MAX543ACPA
MAX543ACSA
MAX543AEPA
MAX543BCPA
MAX543BCWE
8085 timing diagram for Call on positive instruction
8085 advantages
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Untitled
Abstract: No abstract text available
Text: SIEMENS 868352-Bit Dynamic Sequential Access Memory for Television Applications TV-SAM SDA 9251-2X Prelim inary Data CM OS IC Features • 2 1 2 x 6 4 x 1 6 x 4-bit organization • Triple port architecture • O ne 16 x 4-bit input shift register • T w o 16 x 4-bit output shift registers
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868352-Bit
9251-2X
fl235
P-LCC-44-1
fl23Sfc
A235b05
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MAX543BESA
Abstract: No abstract text available
Text: 19-1972, Rev 1; 10/92 CMOS, 12-Bit, Serial-Input M ultiplying DAC _ F e a tu re s ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ O rd erin g In fo rm a tio n The MAX543 contains a 12-bit R-2R type DAC, a serial-in parallel-out shift register, a DAC register and control
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12-Bit,
MAX543
12-bit
MAX543.
MAX543ACSA
MAX543BCSA
MAX543ACWE
MAX543BCED
MAX543BESA
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