Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    SL74L Search Results

    SL74L Datasheets (64)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SL74LS05 System Logic Semiconductor Hex Inverters with Open-Drain Outputs Original PDF
    SL74LS05D System Logic Semiconductor Hex Inverters with Open-Drain Outputs Original PDF
    SL74LS05N System Logic Semiconductor Hex Inverters with Open-Drain Outputs Original PDF
    SL74LS06 System Logic Semiconductor Hex Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS06D System Logic Semiconductor Hex Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS06N System Logic Semiconductor Hex Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS07 System Logic Semiconductor Hex Non-Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS07D System Logic Semiconductor Hex Non-Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS07N System Logic Semiconductor Hex Non-Inverted Buffers with Open-Collector Outputs Original PDF
    SL74LS138 System Logic Semiconductor 3-to-8-Line Decoder/Demultiplexer Original PDF
    SL74LS138D System Logic Semiconductor 3-to-8-Line Decoder/Demultiplexer Original PDF
    SL74LS138N System Logic Semiconductor 3-to-8-Line Decoder/Demultiplexer Original PDF
    SL74LS14 System Logic Semiconductor Hex Schmitt-Trigger Inverter Original PDF
    SL74LS14D System Logic Semiconductor Hex Schmitt-Trigger Inverter Original PDF
    SL74LS14N System Logic Semiconductor Hex Schmitt-Trigger Inverter Original PDF
    SL74LS157 System Logic Semiconductor Quad 2-Input Data Selector/Multiplexer Original PDF
    SL74LS157D System Logic Semiconductor Quad 2-Input Data Selector/Multiplexer Original PDF
    SL74LS157N System Logic Semiconductor Quad 2-Input Data Selector/Multiplexer Original PDF
    SL74LS161 System Logic Semiconductor Synchronous 4 Bit Counters Binary, Direct Reset Original PDF
    SL74LS161D System Logic Semiconductor Synchronous 4 Bit Counters Binary, Direct Reset Original PDF

    SL74L Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    SL74LS06

    Abstract: SL74LS06D SL74LS06N
    Text: SL74LS06 Hex Inverted Buffers with Open-Collector Outputs This device contains hex inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( t PD = 8.5 ns typical) • Low Power Dissipation (PD = 18 mW per Gate)


    Original     		SL74LS06 SL74LS06N SL74LS06D SL74LS06 PDF

    SL74LV00

    Abstract: HCT00A
    Text: TECHNICAL DATA SL74LV00 Quad 2-Input NAND Gate The SL74LV00 is low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT00A. The SL74LV00 provides the 2-Input NAND function. • • • Optimized for Low Voltage applications: 1.2 to 3.6 V


    Original     		SL74LV00 SL74LV00 74HC/HCT00A. SL74LV00N SL74LV00D HCT00A PDF

    74HC/HCT14

    Abstract: 74LV14 SL74LV14 SL74LV14D SL74LV14N
    Text: TECHNICAL DATA SL74LV14 Hex Schmitt-Trigger Inverter The 74LV14 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger action. • • • • Wide Operating Voltage: 1.0 to 5.5 V


    Original     		SL74LV14 74LV14 74HC/HCT14. SL74LV14N SL74LV14D 74HC/HCT14 SL74LV14 PDF

    1N3064

    Abstract: 1N916 SL74LS164 SL74LS164D SL74LS164N
    Text: SL74LS164 8-Bit Serial-Input/Parallel-Output Shift Register This 8-bit shift register features gated serial inputs and an asynchronous reset. The gated serial inputs A and B permit complete control over incoming data as a low at either (or both) input(s) inhibits


    Original     		SL74LS164 1N916 1N3064. 1N3064 SL74LS164 SL74LS164D SL74LS164N PDF

    SL74LS06N

    Abstract: SL74LS06 SL74LS06D
    Text: SL74LS06 Hex Inverted Buffers with Open-Collector Outputs This device contains hex inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( tPD = 8.5 ns typical) • Low Power Dissipation (PD = 18 mW per Gate)


    Original     		SL74LS06 SL74LS06N SL74LS06D SL74LS06 PDF

    74LV138

    Abstract: SL74HC138 SL74HCT138 SL74LV138 SL74LV138D SL74LV138N 08430
    Text: SL74LV138 3-TO-8 DECODER/DEMULTIPLEXER By pinning SL74LV138 are compatible with SL74HC138 and SL74HCT138 series. Input voltage levels are compatible with standard CMOS ones. • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS


    Original     		SL74LV138 SL74LV138 SL74HC138 SL74HCT138 SL74LV138N SL74LV138D 74LV138 08430 PDF

    SL74LS05

    Abstract: SL74LS05D SL74LS05N
    Text: SL74LS05 Hex Inverters with Open-Drain Outputs This device contains idenpendent inverts. It performs the Boolean function Y=A. The open collector outputs require pull-up resistor to perform correctly. Open-collector devices are often used to generate higher VOH levels.


    Original     		SL74LS05 SL74LS05N SL74LS05D SL74LS05 PDF

    1N3064

    Abstract: 1N916 SL74LS14 SL74LS14D SL74LS14N
    Text: SL74LS14 Hex Schmitt-Trigger Inverter This device contains six independent gates each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter free output.


    Original     		SL74LS14 SL74LS14N SL74LS14D 1N916 1N3064. 1N3064 SL74LS14 PDF

    74LVU04

    Abstract: 74HCU04 SL74LVU04 SL74LVU04D SL74LVU04N
    Text: TECHNICAL DATA SL74LVU04 Hex Inverter N SUFFIX PLASTIC The 74LVU04 is a low-voltage, Si-gate CMOS device and is pin compatible with the 74HCU04. The 74LVU04 is a general purpose hex inverter. Each of the six inverters is a single stage with unbuffered outputs.


    Original     		SL74LVU04 74LVU04 74HCU04. SL74LVU04N SL74LVU04D IN74LVU04 74HCU04 SL74LVU04 SL74LVU04D SL74LVU04N PDF

    SL74LS07N

    Abstract: SL74LS07 SL74LS07D
    Text: SL74LS07 Hex Non-Inverted Buffers with Open-Collector Outputs This device contains hex non inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( tPD = 12 ns typical) • Low Power Dissipation (PD = 13 mW per Gate)


    Original     		SL74LS07 SL74LS07N SL74LS07D SL74LS07 PDF

    b 108 b

    Abstract: SL74LV374D SL74LV374N SL74HC374 SL74HCT374 SL74LV374
    Text: SL74LV374 OCTAL D-TIME FLIP-FLOP; POSITIVE EDGETRIGGER 3-StatE SL74LV374 are compatible by pinning with SL74HC374 and SL74HCT374 series. Input voltage levels are compatible with standard CMOS levels. • Output voltage levels are compatible with input levels of CMOS,


    Original     		SL74LV374 SL74LV374 SL74HC374 SL74HCT374 SL74LV374N SL74LV374D b 108 b PDF

    SL74LS07

    Abstract: SL74LS07D SL74LS07N
    Text: SL74LS07 Hex Non-Inverted Buffers with Open-Collector Outputs This device contains hex non inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( t PD = 12 ns typical) • Low Power Dissipation (PD = 13 mW per Gate)


    Original     		SL74LS07 SL74LS07N SL74LS07D SL74LS07 PDF

    25lv32

    Abstract: IZ74LV32 SL74LV32 SL74LV32D SL74LV32N 09 0119 00 05 pulse 1009
    Text: TECHNICAL DATA SL74LV32 Quad 2-Input OR Gate The SL74LV32 is low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT32A. The SL74LV32 provides the 2-input AND function. • • • Optimized for Low Voltage applications: 1.2 to 3.6 V


    Original     		SL74LV32 SL74LV32 74HC/HCT32A. SL74LV32N SL74LV32D IZ74LV32 25LV32 25lv32 IZ74LV32 SL74LV32D SL74LV32N 09 0119 00 05 pulse 1009 PDF

    LS257

    Abstract: LS157 STROBE 1N3064 1N916 LS157 SL74LS157 SL74LS157D SL74LS157N LS257 STROBE
    Text: SL74LS157 Quad 2-Input Data Selector/Multiplexer This monolitic data selector/multiplexer contains inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of


    Original     		SL74LS157 LS157 LS257 SL74LS157N SL74LS157D 1N916 1N3064. LS157 STROBE 1N3064 SL74LS157 LS257 STROBE PDF

    25LV04

    Abstract: a25N CLVCC SL74LV04 SL74LV04D SL74LV04N
    Text: TECHNICAL DATA SL74LV04 Hex Inverter The SL74LV04 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT04A. The SL74LV04 provides six inverting buffers. • • • • Wide Operating Voltage: 1.0 ~ 5.5 V Optimized for Low Voltage applications: 1.0 ~ 3.6 V


    Original     		SL74LV04 SL74LV04 74HC/HCT04A. SL74LV04N SL74LV04D 25LV04 a25N CLVCC PDF

    1N3064

    Abstract: 1N916 SL74LS161 SL74LS161D SL74LS161N
    Text: SL74LS161 Synchronous 4 Bit Counters; Binary, Direct Reset This synchronous, presettable counter features an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change conicident with each other


    Original     		SL74LS161 1N916 1N3064. 1N3064 SL74LS161 SL74LS161D SL74LS161N PDF

    SL74LV240

    Abstract: SL74LV244DW SL74LV244N
    Text: TECHNICAL DATA SL74LV244 OCTAL BUFFER/LINE DRIVE; 3-STATE The SL74LV244 is a low-voltage Si-gate CMOS device and is pin and function compatible with SL74HC/HCT244. The SL74LV244 is an octal non-inverting buffer/line driver with 3state outputs. The 3-state outputs are controlled by the output enable


    Original     		SL74LV244 SL74LV244 SL74HC/HCT244. SL74LV240 SL74LV244DW SL74LV244N PDF

    SL74LV08

    Abstract: No abstract text available
    Text: TECHNICAL DATA SL74LV08 Quad 2-Input AND Gate The SL74LV08 is low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT08A. The SL74LV08 provides the 2-input AND function. • • • Optimized for Low Voltage applications: 1.2 to 3.6 V


    Original     		SL74LV08 SL74LV08 74HC/HCT08A. SL74LV08N SL74LV08D PDF

    SL74HC373

    Abstract: SL74HCT373 SL74LV373 SL74LV373D SL74LV373N
    Text: SL74LV373 OCTAL D-TYPE TRANSPARENT LATCH 3-State SL74LV373 are compatible by pinning with SL74HC373 and SL74HCT373 series. Input voltage levels are compatible with standard CMOS levels. • Output voltage levels are compatible with input levels of CMOS,


    Original     		SL74LV373 SL74LV373 SL74HC373 SL74HCT373 SL74LV373N SL74LV373D PDF

    SL74LS138

    Abstract: 1N3064 1N916 SL74LS138D SL74LS138N
    Text: SL74LS138 3-to-8-Line Decoder/Demultiplexer This schottky-clamped TTL MSI circuit is designed to be used in high-performance memory-decording or data-routing applications requiring very short propagation delay time. In high-performance memory systems this decode can be used to minimize the effects of


    Original     		SL74LS138 1N916 1N3064. SL74LS138 1N3064 SL74LS138D SL74LS138N PDF

    Logic PROBE diagram circuit

    Abstract: 1N3064 1N916 SL74LS245 SL74LS245D SL74LS245N
    Text: SL74LS245 Octal 3-State Noninverting Bus Transceiver These octal bus transceiver are designed for asynchronous twoway communication between data buses. The control function implementation minimized external timing requirements. The device allows data transmission from the A bus to the B bus or


    Original     		SL74LS245 20-Pin 1N916 1N3064. Logic PROBE diagram circuit 1N3064 SL74LS245 SL74LS245D SL74LS245N PDF

    0108

    Abstract: b 108 b 74LV245 SL74HC245 SL74HCT245 SL74LV245 SL74LV245D SL74LV245N A709 09 0140 70 05
    Text: SL74LV245 OCTAL BUS TRANSCEIVER 3-State By pinning SL74LV245 are compatible with SL74HC245 and SL74HCT245 series. Input voltage levels are compatible with standard CMOS levels. • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS


    Original     		SL74LV245 SL74LV245 SL74HC245 SL74HCT245 SL74LV245N SL74LV245D 0108 b 108 b 74LV245 A709 09 0140 70 05 PDF

    SL74HC573

    Abstract: 28-22-18 SL74HCT573 SL74LV573 SL74LV573D SL74LV573N 74LV573 0108
    Text: SL74LV573 OCTAL D-TYPE TRANSPARENT LATCH 3-State By pinning SL74LV573 are compatible with SL74HC573 and SL74HCT573 series. Input voltage levels are compatible with stadard CMOS levels. • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS


    Original     		SL74LV573 SL74LV573 SL74HC573 SL74HCT573 than150 SL74LV573N SL74LV573D 28-22-18 74LV573 0108 PDF

    SL74LS86

    Abstract: 1N3064 1N916 SL74LS86D SL74LS86N
    Text: SL74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION SL74LS86N Plastic SL74LS86D SOIC TA = 0° to 70° C for all


    Original     		SL74LS86 SL74LS86N SL74LS86D 1N916 1N3064. SL74LS86 1N3064 PDF