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    SN74LV132ANS Search Results

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    Part ECAD Model Manufacturer Description Download Buy
    SN74LV132ANSR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 125 Visit Texas Instruments Buy
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    Texas Instruments SN74LV132ANSR

    IC GATE NAND 4CH 2IN 14SOP
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    DigiKey SN74LV132ANSR Cut Tape 1,970 1
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    SN74LV132ANSR Digi-Reel 1,970 1
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    SN74LV132ANSR Reel 2,000
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    Mouser Electronics SN74LV132ANSR 1,994
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    Quest Components SN74LV132ANSR 772
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    Rochester Electronics SN74LV132ANSR 4,000 1
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    Rochester Electronics LLC SN74LV132ANS

    IC GATE NAND
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    Rochester Electronics LLC SN74LV132ANSR

    IC GATE NAND 4CH 2IN 14SOP
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    Texas Instruments SN74LV132ANS

    NAND Gate, LV/LV-A/LVX/H Series, 4-Func, 2-Input, PDSO14 '
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    Rochester Electronics SN74LV132ANS 9,150 1
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    SN74LV132ANS Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV132ANS Texas Instruments QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Original PDF
    SN74LV132ANSR Texas Instruments SN74LV132 - Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs Original PDF
    SN74LV132ANSR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSR Texas Instruments Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE NAND 4CH 2-INP 14-SO Original PDF
    SN74LV132ANSRE4 Texas Instruments SN74LV132 - Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSRE4 Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs Original PDF
    SN74LV132ANSRE4 Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSRE4 Texas Instruments Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE NAND 4CH 2-INP 14-SO Original PDF
    SN74LV132ANSRG4 Texas Instruments SN74LV132 - Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSRG4 Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 Original PDF
    SN74LV132ANSRG4 Texas Instruments Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE NAND 4CH 2-INP 14-SO Original PDF

    SN74LV132ANS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    SN74LV132APWR

    Abstract: A115-A C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A SN74LV132APWR A115-A C101 LV132A SN54LV132A SN74LV132A

    texas instruments package marking

    Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
    Text: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the


    Original     		PDF SN74LV139ANSR SN74LV174ANS SN74LV174ANSR SN74LV175ANS SN74LV175ANSR SN74LV273ANS SN74LV273ANSR SN74LV540ANS SN74LV540ANSR SN74LV573ANS texas instruments package marking lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: SN54LV132A, SN74LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A. A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D SN54LV132A . . . J OR W PACKAGE SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    LV132A

    Abstract: A115-A C101 SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D SN54LV132A . . . J OR W PACKAGE SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) LV132A A115-A C101 SN54LV132A SN74LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D SN54LV132A . . . J OR W PACKAGE SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D SN54LV132A . . . J OR W PACKAGE SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original     		PDF SN54LV132A, SN74LV132A SCLS394D 000-V A114-A) A115-A) SN54LV132A SN74LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: SN54LV132A, SN74LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A.

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    LV132A

    Abstract: A115-A C101 SN54LV132A SN74LV132A
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394G − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394G 000-V A114-A) A115-A) SN54LV132A LV132A A115-A C101 SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    74ls74apc

    Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
    Text: Standard Linear and Logic Products Cross-Reference Introduction Notice This Standard Linear and Logic Products CrossReference will assist in finding a device made by Texas Instruments that is a drop-in or similar replacement to many of our competitors’ standard linear and logic products.


    Original     		PDF

    LV132A

    Abstract: SN54LV132A SN74LV132A SN74LV132AD SN74LV132ADBR SN74LV132ADR SN74LV132ANSR SN74LV132APW SN74LV132APWR SN74LV132APWT
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394E – APRIL 1998 – REVISED JULY 2003 D D D D SN54LV132A . . . J OR W PACKAGE SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		PDF SN54LV132A, SN74LV132A SCLS394E SN54LV132A 000-V A114-A) A115-A) LV132A SN54LV132A SN74LV132A SN74LV132AD SN74LV132ADBR SN74LV132ADR SN74LV132ANSR SN74LV132APW SN74LV132APWR SN74LV132APWT

    MC0628R

    Abstract: 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		PDF SCYB017A T74ALVC32374 74CBTLV16211 SN74CBTD16211 SN74SSTV16859 SN74CBTLV16211GRDR SN74ALVC16245AGRDR -SN74SSTV16859GKER MC0628R 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: SN54LV132A, SN74LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A.

    Untitled

    Abstract: No abstract text available
    Text: SN54LV132A, SN74LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: SN54LV132A, SN74LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original     		PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A.