A115-A
Abstract: C101 SN54LV00A SN74LV00A
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B
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SN54LV00A,
SN74LV00A
SCLS389G
SN54LV00A
A115-A
C101
SN54LV00A
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B
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SN54LV00A,
SN74LV00A
SCLS389G
SN54LV00A
SN74LV00A
000-V
A114-A)
A115-A)
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LV00A
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389E – SEPTEMBER 1997 – REVISED AUGUST 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y
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SN54LV00A,
SN74LV00A
SCLS389E
SN54LV00A
SN74LV00A
000-V
A114-A)
A115-A)
LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
A115-A
Abstract: C101 SN54LV00A SN74LV00A
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
A115-A
C101
SN54LV00A
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D Ioff Supports Partial-Power-Down Mode D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce SN54LV00A . . . J OR W PACKAGE
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SN54LV00A,
SN74LV00A
SCLS389J
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B
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SN54LV00A,
SN74LV00A
SCLS389G
SN54LV00A
SN74LV00A
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN54LV00A SN74LV00A
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
A115-A
C101
SN54LV00A
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
|
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
A115-A
Abstract: C101 SN54LV00A SN74LV00A
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
A115-A
C101
SN54LV00A
SN74LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
LV00A
Abstract: A115-A C101 SN54LV00A SN74LV00A 74lv00a
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389D – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
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SN54LV00A,
SN74LV00A
SCLS389D
000-V
A114-A)
A115-A)
SN54LV00A
LV00A
A115-A
C101
SN54LV00A
SN74LV00A
74lv00a
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
|
Untitled
Abstract: No abstract text available
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
000-V
A114-A)
A115-A)
SN54LV00A
|
A115-A
Abstract: C101 SN54LV00A SN74LV00A lv00a
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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PDF
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SN54LV00A,
SN74LV00A
SCLS389J
SN54LV00A
A115-A
C101
SN54LV00A
SN74LV00A
lv00a
|
SN74LV00A
Abstract: A115-A C101 SN54LV00A
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389H – SEPTEMBER 1997 – REVISED JULY 2003 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y
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SN54LV00A,
SN74LV00A
SCLS389H
SN54LV00A
SN74LV00A
A115-A
C101
SN54LV00A
|
A115-A
Abstract: C101 SN54LV00A SN74LV00A 74lv00a
Text: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389D – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
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Original
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SN54LV00A,
SN74LV00A
SCLS389D
000-V
A114-A)
A115-A)
SN54LV00A
A115-A
C101
SN54LV00A
SN74LV00A
74lv00a
|