Untitled
Abstract: No abstract text available
Text: Active Errata List • • • • During UART Reception, Clearing REN May Generate Unexpected IT SPI Interface - Transmission on Master Mode SPI Interface - SPI SS pin Limitation on Master/Slave SPI - SPI Slave Responding in a Multislave Configuration When Not Selected by the
|
Original
|
AT83C51IC2/T80C51ID2
|
PDF
|
AT80C51ID2
Abstract: spi slave atmel 8051 datasheet 80C51 AT80C51RD2 AT83C51RB2 AT83C51RC2 Atmel AT80 AT83C51IC2
Text: Active Errata List • • • • During UART Reception, Clearing REN May Generate Unexpected IT SPI Interface - Transmission on Master Mode SPI Interface - SPI SS pin Limitation on Master/Slave SPI - SPI Slave Responding in a Multislave Configuration When Not Selected by the
|
Original
|
AT83C51IC2/T80C51ID2
4242B
AT80C51ID2
spi slave
atmel 8051 datasheet
80C51
AT80C51RD2
AT83C51RB2
AT83C51RC2
Atmel AT80
AT83C51IC2
|
PDF
|
JTAG MODULE SPI
Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Text: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
BH820-1)
88P8341
drw38
JTAG MODULE SPI
spi flash parallel port
TSOP 28 SPI memory Package flash
88P8341
|
PDF
|
IDT88P8344
Abstract: 88P8344
Text: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
BH820-1)
88P8344
IDT88P8344
88P8344
|
PDF
|
TSOP 48 thermal resistance type1
Abstract: IDT88P8342 drw22
Text: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
BH820-1)
88P8342
TSOP 48 thermal resistance type1
IDT88P8342
drw22
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
IDT88P8341
800MHz
BH820-1)
88P8341
|
PDF
|
spi FIFO
Abstract: IDT88P8344 DSC-6370
Text: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
IDT88P8344
800MHz
BH820-1)
88P8344
spi FIFO
IDT88P8344
DSC-6370
|
PDF
|
spi on parallel port
Abstract: IDT88P8342
Text: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
IDT88P8342
800MHz
BH820-1)
88P8342
6370a
spi on parallel port
IDT88P8342
|
PDF
|
software uart SC16IS740
Abstract: UART abstract AN10428 UART-SPI gateway Philips slave bridges SPI to RS232 SC16IS740 UART-SPI Gateway for Philips SPI slave bridges spi slave cable gateway reference design spi In Circuit Serial Programming
Text: AN10428 UART-SPI Gateway for Philips SPI slave bridges Rev. 01 — 7 March 2006 Application note Document information Info Content Keywords UART-SPI Gateway, UART to SPI, RS-232 to SPI Abstract The UART-SPI Gateway enables a PC that has a UART port to communicate with a SPI slave device using an RS-232 terminal. With the
|
Original
|
AN10428
RS-232
SC16IS740/750/760/752/762
AN10428
software uart SC16IS740
UART abstract
UART-SPI gateway Philips slave bridges
SPI to RS232
SC16IS740
UART-SPI Gateway for Philips SPI slave bridges
spi slave
cable gateway reference design
spi In Circuit Serial Programming
|
PDF
|
AVR319
Abstract: AVR310 atmega128 SPI code example Application Note ATTINY2313
Text: AVR319: Using the USI module for SPI communication 8-bit Microcontrollers Features • C-code driver for SPI master and slave • Uses the USI module • Supports SPI Mode 0 and 1 Application Note Introduction The Serial Peripheral Interface SPI allows high-speed synchronous data transfer
|
Original
|
AVR319:
ATmega169,
ATtiny26
ATtiny2313
582A-AVR-09/04
AVR319
AVR310
atmega128 SPI code example
Application Note ATTINY2313
|
PDF
|
AVR151
Abstract: AVR910 SCK 104 avr spi ICE200 STK500
Text: AVR151: Setup And Use of The SPI Features • • • • • • • SPI Pin Functionality Multi Slave Systems SPI Timing SPI Transmission Conflicts Emulating the SPI Code examples for Polled operation Code examples for Interrupt Controlled operation 8-bit RISC
|
Original
|
AVR151:
2585C
AVR151
AVR910
SCK 104
avr spi
ICE200
STK500
|
PDF
|
cheetah
Abstract: Leopard Logic WIN32
Text: Cheetah SPI Host Adapter Features • SPI Master • Full Duplex SPI at 40 MHz • Unsupported Overclocking up to 50 MHz • All Modes Supported • High-Speed USB Device 480 Mbps transfer to host PC • Actual Host Data Throughput Nearly 100% of SPI Clock Rate
|
Original
|
|
PDF
|
AVR1309: Using the XMEGA SPI
Abstract: AVR1309 xmega MOSI MEANING spi operation xmega usb
Text: AVR1309: Using the XMEGA SPI Features • Introduction to SPI and the XMEGA SPI module • Setup and use of the XMEGA SPI module • Implementation of module drivers Polled master Interrupt controlled master Polled slave Interrupt controlled slave • Code examples for interrupt controlled and polled drivers
|
Original
|
AVR1309:
057A-AVR-02/08
AVR1309: Using the XMEGA SPI
AVR1309
xmega
MOSI MEANING
spi operation
xmega usb
|
PDF
|
LatticeMico32
Abstract: No abstract text available
Text: LatticeMico SPI The LatticeMico serial peripheral interface SPI provides an industrystandard interface between a LatticeMico32 processor and off-chip peripherals, as shown in Figure 1. In master mode, the SPI can be configured to control communication with up to 32 off-chip SPI ports. In slave mode, the
|
Original
|
LatticeMico32
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.20 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 9 Mbps1 General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
16-bit
|
PDF
|
psoc full projects
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.30 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
16-bit
psoc full projects
|
PDF
|
AVR151
Abstract: AVR910 ICE200 STK500
Text: AVR151: Setup And Use of The SPI Features • • • • • • • SPI Pin Functionality Multi Slave Systems SPI Timing SPI Transmission Conflicts Emulating the SPI Code examples for Polled operation Code examples for Interrupt Controlled operation 8-bit RISC
|
Original
|
AVR151:
2585B
AVR151
AVR910
ICE200
STK500
|
PDF
|
cypress flash 370
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.40 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
16-bit
cypress flash 370
|
PDF
|
0x1113
Abstract: No abstract text available
Text: PSoC Creator Component Data Sheet Serial Peripheral Interface SPI Master 2.0 Features • 2- to 16-bit data width • 4 SPI operating modes • Data rates to 33 Mb/s General Description The SPI Master component provides an industry-standard 4-wire master SPI interface, as well
|
Original
|
16-bit
0x1113
|
PDF
|
SC18IM700
Abstract: RS-232 to i2c converter sc18is602ipw I2C master controller uart i2c to RS-232 converter LCD 16PIN 4 SC18IS600 SC18IS600IPW SC18IS601 SC18IS602
Text: NXP I2C/SPI master bridges SC18IS600/601, SC18IS602/603, and SC18IM700 Connect I2C/SPI slave or UART to I2C/SPI master or GPIO These compact protocol converters create seamless, low-power, low-voltage interface connections, so they make it quick and easy to add I2C/SPI master and GPIO capability to
|
Original
|
SC18IS600/601,
SC18IS602/603,
SC18IM700
SC18IS600/601
SC18IM700
RS-232 to i2c converter
sc18is602ipw
I2C master controller uart
i2c to RS-232 converter
LCD 16PIN 4
SC18IS600
SC18IS600IPW
SC18IS601
SC18IS602
|
PDF
|
SCA1020
Abstract: sca1000 SCA100T spi 3 wire SCA103T SCA61T
Text: Technical Note 15 1 5 SPI Interface Specification OBJECTIVE This document specifies the Serial Peripheral Interface (SPI) that is used in the SCA61T, SCA100T, SCA103T, SCA1000, and SCA1020 –series sensors. THE SPI INTERFACE A Serial Peripheral Interface (SPI) system consists of one master device and one or more slave devices. The
|
Original
|
SCA61T,
SCA100T,
SCA103T,
SCA1000,
SCA1020
D-60528
FIN-01621
SCA1020
sca1000
SCA100T
spi 3 wire
SCA103T
SCA61T
|
PDF
|
80C51
Abstract: T89C51RB2 T89C51RC2
Text: Active Errata List • • • • • • • • • • During UART Reception, Clearing REN May Generate Unexpected IT Internal Resistor on Reset Pin SPI – SPI SS Pin Limitation on Master/Slave SPI – SPI Slave Responding in a Multislave Configuration When Not Selected by the
|
Original
|
T89C51RB2
T89C51RC2
80C51
4100B
T89C51RB2
T89C51RC2
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Data Sheet Serial Peripheral Interface SPI Master 2.10 Features • 3- to 16-bit data width 4 SPI operating modes Bit Rate up to 9 Mbps * General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
16-bit
|
PDF
|
M95512 diagram
Abstract: M95512-DR M95512-W M95512 M95512-R
Text: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit
|
Original
|
M95512-DR
M95512-R
M95512-W
M95512-W
M95512-R:
M95512-DR:
M95512 diagram
M95512-DR
M95512
|
PDF
|