GAL20V8B-15LD
Abstract: pDS4102-DL2 5962-8983903RA 5962-8983904RA lb388 ispPAC-power1208 GAL20V8B-15LD/883 CPLD military SMD TQFP microcontroller HW7265-dl2
Text: Bringing the Best Together Product Selector Guide Bringing the Best Together Lattice Solutions Introduction Lattice Semiconductor, the company that pioneered In-System Programmability ISP , offers the industry’s broadest and most diverse portfolio of programmable system solutions.
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I0162
GAL20V8B-15LD
pDS4102-DL2
5962-8983903RA
5962-8983904RA
lb388
ispPAC-power1208
GAL20V8B-15LD/883
CPLD military
SMD TQFP microcontroller
HW7265-dl2
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sqfp 14x20
Abstract: 74ALSXX P51XA-G3 OTP-e PC 74 HCT 32 P sQFP 14X14 TDA1308 equivalent SG 2368 tqfp 14x14 tray TDA1308 application notes
Text: Philips Semiconductors Product specification Class AB stereo headphone driver TDA1308 FEATURES GENERAL DESCRIPTION • Wide temperature range The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has
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30MHz
80C51
sqfp 14x20
74ALSXX
P51XA-G3
OTP-e
PC 74 HCT 32 P
sQFP 14X14
TDA1308 equivalent
SG 2368
tqfp 14x14 tray
TDA1308 application notes
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YUV422 sequence rgb888
Abstract: lc822973 YUV422 marking gb0 18bitRGB MARKING BB5 ic RGB-666 BB2 marking RGB888 to vga converter ic image enhancer
Text: Ordering number : ENA2131 LC822973 CMOS LSI TV Image Viewer LSI Overview This LSI is TV image viewer. A 16Mbit SDRAM is built-in as image frame buffers, on which an external CPU is able to draw the images, then another part of this LSI displays the SDRAM images on TV in NTSC/PAL after video
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ENA2131
LC822973
16Mbit
ITU-R601
27MHz/NTSC,
75MHz/PAL)
A2131-27/27
YUV422 sequence rgb888
lc822973
YUV422
marking gb0
18bitRGB
MARKING BB5 ic
RGB-666
BB2 marking
RGB888 to vga converter ic
image enhancer
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Untitled
Abstract: No abstract text available
Text: Ordering number : ENA2131 LC822973 CMOS LSI TV Image Viewer LSI Overview This LSI is TV image viewer. A 16Mbit SDRAM is built-in as image frame buffers, on which an external CPU is able to draw the images, then another part of this LSI displays the SDRAM images on TV in NTSC/PAL after video
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ENA2131
LC822973
16Mbit
ITU-R601
27MHz/NTSC,
75MHz/PAL)
A2131-27/27
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Untitled
Abstract: No abstract text available
Text: Ordering number : ENA2131 LC822973 CMOS LSI TV Image Viewer LSI http://onsemi.com Overview This LSI is TV image viewer. A 16Mbit SDRAM is built-in as image frame buffers, on which an external CPU is able to draw the images, then another part of this LSI displays the SDRAM images on TV in NTSC/PAL after video
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ENA2131
LC822973
16Mbit
ITU-R601
27MHz/NTSC,
75MHz/PAL)
A2131-27/27
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transistor SR 13001
Abstract: RCA SK CROSS-REFERENCE PCD8572I ATmel 730 24c04 SR 13001 transistor atmel 716 24c04 UNITRODE applications handbook uc3842 -96 all 89c51 microcontroller references book QFP44 footprint HI5618
Text: INTEGRATED CIRCUITS DATA SHEET PCF5001 POCSAG Paging Decoder Product specification Supersedes data of 1995 Apr 27 File under Integrated Circuits, IC17 1997 Mar 04 Philips Semiconductors Product specification POCSAG Paging Decoder PCF5001 CONTENTS BLOCK DIAGRAMS
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PCF5001
TAPE11
TAPE13
transistor SR 13001
RCA SK CROSS-REFERENCE
PCD8572I
ATmel 730 24c04
SR 13001 transistor
atmel 716 24c04
UNITRODE applications handbook uc3842 -96
all 89c51 microcontroller references book
QFP44 footprint
HI5618
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ks 4290 industrial controller
Abstract: AKA NF 028 ATT2C12 ATT ORCA fpga ATT2C08 ATT2C15 52833 trw 2015 ptc ei 8n CODE PJ 62-00
Text: Preliminary Data Sheet January 1995 AT&T Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features • High density: 3,500 to 26,000 usable gates ■ High I/O: up to 384 usable I/O ■ High-performance 0.5 (xm CMOS technology
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16-bit
32-bit
84-Pin
144-Pin
208-Pin
240-Pin
304-Pin
364-Pin
429-Pin
PS208
ks 4290 industrial controller
AKA NF 028
ATT2C12
ATT ORCA fpga
ATT2C08
ATT2C15
52833
trw 2015
ptc ei 8n
CODE PJ 62-00
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ATT ORCA fpga
Abstract: ATT ORCA fpga architecture
Text: Data Sheet May 1995 f^ A D s T Microelectronics Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (for ATT1C09)
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ATT1C03,
ATT1C05,
ATT1C07,
ATT1C09)
16-bit
DS95-084FPGA
DS94-131FPGA)
ATT ORCA fpga
ATT ORCA fpga architecture
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PBII MIL-STD-810E
Abstract: R6C12
Text: Lucent Technologies Bell Labs Innovations Optimized Reconfigurable Cell Array ORCA ATT2Cxx Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 jim technology (four-input look-up table delay less than 3.6 ns)
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S240/
PS240
256-Pin
304-Pln
S304/
PS304
364-Pin
428-Pin
ATT2C15,
ATT2C26
PBII MIL-STD-810E
R6C12
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Untitled
Abstract: No abstract text available
Text: Data Sheet — A IK T M arch1995 I p E le c tr o n ic s Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (forATT1C09)
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arch1995
ATT1C03,
ATT1C05,
ATT1C07,
ATT1C09)
forATT1C09)
16-bit
84-Pin
100-Pin
ATT1C03
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Untitled
Abstract: No abstract text available
Text: AT&T Data Sheet October 1995 Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features Description • High-performance, cost-effective 0.5 |im technology (four-input look-up table delay less than 3.6 ns)
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ATT2C04,
ATT2C06,
ATT2C08,
ATT2C10,
ATT2C12,
ATT2C15,
ATT2C26,
ATT2C40.
DS95-183FPGA
DS95-031
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a15#016
Abstract: PT15D RSC11 5T48
Text: Datasheet microelectronics group June 1999 Lucent Technologies Bell Labs Innovations ORCA Series 2 Field-Programmable Gate Arrays Features • High-performance, cost-effective, low-power 0.35 pm CMOS technology OR2CxxA , 0.3 pm CMOS technology (OR2TxxA), and 0.25 |jm CMOS technology
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16-bit
32-bit
DS99-094FPGA
DS98-022FPGA)
a15#016
PT15D
RSC11
5T48
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1C05
Abstract: ATT ORCA fpga architecture PX110 1C09 2843B C05 jj MXM pin assignment 1C03 1C07 PBD 1.27
Text: AT&T Data Sheet March 1995 ' Microelectronics Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (forATT1C09)
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ATT1C03,
ATT1C05,
ATT1C07,
ATT1C09)
forATT1C09)
16-bit
84-Pin
100-Pin
132-Pin
144-Pin
1C05
ATT ORCA fpga architecture
PX110
1C09
2843B
C05 jj
MXM pin assignment
1C03
1C07
PBD 1.27
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1C07
Abstract: plj1 ATT ORCA fpga architecture ATT ORCA fpga HC s304 1C09 ic all pics IC PIN CONFIGURATION OF 74 47 1C03 1C05
Text: AT&T Data Sheet March 1995 ' Microelectronics Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (forATT1C09)
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ATT1C03,
ATT1C05,
ATT1C07,
ATT1C09)
forATT1C09)
16-bit
84-Pin
100-Pin
132-Pin
144-Pin
1C07
plj1
ATT ORCA fpga architecture
ATT ORCA fpga
HC s304
1C09
ic all pics
IC PIN CONFIGURATION OF 74 47
1C03
1C05
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100-PIN TQFP XILINX DIMENSION
Abstract: No abstract text available
Text: m i cr o e le ct r o n ic s group Data Sheet February 1997 Lucent Technologies Bell Labs Innovations ATT3000 Series Field-Programmable Gate Arrays Features Description • High performance: — Up to 270 MHz toggle rates — 4-input LUT delays <2.7 ns The CMOS ATT3000 Series Field-Programmable
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ATT3000
DS97-048FPG
DS94-177FPGA)
100-PIN TQFP XILINX DIMENSION
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Untitled
Abstract: No abstract text available
Text: Data Sheet m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations ATT3000 Series FPGAs Features Description • High performance: — Up to 270 MHz toggle rates — 4-input LUT delays <2.7 ns The CMOS ATT3000 Series Field-Programmable
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ATT3000
00S002b
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ATT3000
Abstract: ATT3020 ATT3042 ATT3064 ATT3090 XC3000 XC3100 d5ud2l CIL 147 H1 TRANSISTOR
Text: Data Sheet m i c r o e l e c t ro n ic s group Lucent Technologies Bell Labs Innovations ATT3000 Series FPGAs Features Description • High performance: — Up to 270 MHz toggle rates — 4-input LUT delays <2.7 ns The CMOS ATT3000 Series Field-Programmable
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ATT3000
ATT3064
ATT3090
005002b
ATT3020
ATT3042
XC3000
XC3100
d5ud2l
CIL 147 H1 TRANSISTOR
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IC ATA 2398
Abstract: ata 2398 toko rcl 779
Text: Data Sheet m icro e le ctro n ics group Lucent Technologies Bell Labs Innovations ÄTT3000 Series FPGAs Features Description • High performance: — Up to 270 MHz toggle rates — 4-input LUT delays <2.7 ns The CMOS ATT3000 Series Field-Programmable Gate Array FPGA family provides a group of highdensity, digital integrated circuits. Their regular,
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TT3000
IC ATA 2398
ata 2398
toko rcl 779
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D05G
Abstract: No abstract text available
Text: Data Sheet March 1995 •■ ^ ~ — AT&T Microelectronics ATT3000 Series Field-Programmable Gate Arrays Features ■ High performance: — Up to 270 MHz toggle rates — 4-input LUT delays < 3 ns ■ User-programmable gate arrays ■ Flexible array architecture:
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ATT3000
XC3000
XC3100
TT3064
TT3090
005005b
00150bl
D05G
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grid tie inverters circuit diagrams
Abstract: INR 10D 182 ATT3000 2332 prom LS 5208 pinout SI 3105 A ATT3020 ATT3030 ATT3042 ATT3064
Text: m icro e le ctro n ics group i — ç> f :l ^ - t- Lucent Technologies Bell Labs Innovations ATT3000 Series Field-Programmable Gate Arrays Features • High performance: — Up to 270 MHz toggle rates — 4-input LUT delays < 3 ns ■ User-programmable gate arrays
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ATT3000
XC3000
XC3100
grid tie inverters circuit diagrams
INR 10D 182
2332 prom
LS 5208 pinout
SI 3105 A
ATT3020
ATT3030
ATT3042
ATT3064
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XCS3201FN
Abstract: ATT92020 80386SL MC68HC11A1FU
Text: Pomona Innovative Solutions For IC Test Anc Development Expressly designed to facilitate testing of your surface-mounted devices, Pomona IC Test Clips and Pomona Solder-On Adapters are engineered in form and function to provide a convenient interface to logic analyzers for fast and reliable
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Untitled
Abstract: No abstract text available
Text: 1C 5 1 /5 3 SERIES S0P/QFP/QFN ICC /QF1(PLCC)/TCP FEATURES • • S ockets tor SOP, QFP and other surface-m ount 1C packages. Custom designs also available for m ulti-lead, fine-pitch and other special packages. SPECIFICATIONS PERFORMANCE Contact our Sales Department for detail. Specifications differ by the contact
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plcc package 84
Abstract: No abstract text available
Text: AXfiT" Data Sheet October 1993 = „ ” Microelectronics ATT3000 Series High-Performance Field-Programmable Gate Arrays -3, -4 , and -5 Features Description • High performance— up to 270 MHz toggle rates The CMOS ATT3000 Series High-Performance FieldProgrammable Gate Array (FPGA) family provides a
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ATT3000
XC3000*
XC3100
DS93-024FPGA
DS92-194FPGA)
plcc package 84
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ATT3000
Abstract: ATT3020
Text: AT&T Data Sheet July 1992 Microelectronics ATT3000 Series Field-Programmable Gate Arrays FEATURES • High Performance— up to 150 MHz Toggle Rates • User-Programmable Gate Array • I/O functions • Digital logic functions • Interconnections • Flexible array architecture
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ATT3000
XC3000
ATT3020
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