AMD Athlon 64 X2 5000
Abstract: MPT N095 40-A05100-D000 D5036 D552 IC digital clock lcd inverter for notebook CS3711 aA88 U505D ad07 mainboard
Text: A B C D E POWER PLANE LISTING : PWR +3.3V +5V +12V KBVCC NOM +2.5V +3.3VS +5VS ON ON ON ON ON ON ON ON ON ON ON ON POS ON ON ON ON ON ON ON ON ON ON ON ON 2.5V/VCCA_PLL STR ON OFF OFF OFF OFF ON ON ON ON ON OFF ON Thermal sensor OFF OFF OFF OFF OFF OFF OFF
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uPD720101S1
SMS05C
RP543
RP544
RP545
R1008
150PF
AMD Athlon 64 X2 5000
MPT N095
40-A05100-D000
D5036
D552 IC digital clock
lcd inverter for notebook
CS3711
aA88
U505D
ad07 mainboard
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Untitled
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR5517 LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output
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UR5517
UR5517
QW-R102-041
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UR5517
Abstract: MSOP-10 s3h-i
Text: UNISONIC TECHNOLOGIES CO., LTD UR5517 Preliminary LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output
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UR5517
UR5517
MSOP-10
QW-R102-041
MSOP-10
s3h-i
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s3hi
Abstract: No abstract text available
Text: UNISONIC TECHNOLOGIES CO., LTD UR5517 LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output
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UR5517
UR5517
QW-R102-041
s3hi
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core i5 MOTHERBOARD CIRCUIT diagram
Abstract: t101a 243332 STR application PIIX4E dram intel pentium 4 motherboard schematic diagram 443BX 82371AB 82371EB 82443BX
Text: Intel Pentium® II Processor – Low-Power Module Design Guide Application Note February 2000 Order Number: 273212-003 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual
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BAV99-SOT23
Abstract: mitac mitac 6120 str 5V 3A rls4148
Text: 1 2 3 4 5 6 7 8 VMAIN F5 pull high at d/d bd 1 2 FUSE_1206 1A-1206 VDD5 R170 0603 VDD5SW C280 10U 1206 10V LP2951-02BM 2 1 R160 47K 0603 GND R181 100K 0603B R193 Q20 NDS352P S D VDD5S 100K 0603B PME# 18 ADEN# 18,22 18,22 3 STR# RLS4148 MLL34B JP_NET JP_NET15
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A-1206
LP2951-02BM
NDS352P
0603B
DTC144WK
OT23AN
PQ510
0603B
SI2301DS
RLS4148
BAV99-SOT23
mitac
mitac 6120
str 5V 3A
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a7710
Abstract: intel 915 motherboard circuit diagram intel 915 motherboard schematic RSMRST 443BX 82371AB 82371EB 82443BX free circuit diagram of intel 915 motherboard a7713
Text: Intel Pentium® III Processor – Low-Power Module Design Guide Application Note April 2000 Order Number: 273319-002 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual
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Untitled
Abstract: No abstract text available
Text: Technologies GmbH & Co KG Closed Loop Hall Current Sensor CYHCS-DS3 This Hall Effect current sensor is based on closed loop compensating principle and can be used for measurement of DC and AC current, pulse currents etc. The output of the transducer reflects the
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D-85464
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G2992F1U
Abstract: circuit diagram of ddr ram G2992 2N7002 SSTL-18 v5856 jedec MS-012-AA
Text: G2992 Global Mixed-mode Technology Inc. 3A DDR Bus Termination Regulator Features General Description The G2992 is a linear regulator designed to meet the JEDEC SSTL-18, SSTL-2 and SSTL-3 Series Stub Termination Logic specifications for termination of
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G2992
G2992
SSTL-18,
41TYP
016TYP
27TYP
05TYP
G2992F1U
circuit diagram of ddr ram
2N7002
SSTL-18
v5856
jedec MS-012-AA
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str 0765
Abstract: circuit diagram of ddr ram UR6515DG-SH2-R QW-R101-029
Text: UNISONIC TECHNOLOGIES CO., LTD UR6515D LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR6515D is a linear regulator sourcing or sinking continuous 2A or up to 3A transient peak current while regulating an output voltage to within 40mV in the DDR SDRAM bus terminator
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UR6515D
UR6515D
QW-R101-029
str 0765
circuit diagram of ddr ram
UR6515DG-SH2-R
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Untitled
Abstract: No abstract text available
Text: Advanced Power Electronics Corp. AP1270 3A SINK/SOURCE BUS TERMINATION REGULATOR DESCRIPTIOON FEATURES Ideal for DDR-I, DDR-II and DDR-III V TT Applications Sink and Source 3A Continuous Current Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL_18,
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O-252-5L
AP1270
AP1270
1270MP
1270H
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AP-127
Abstract: No abstract text available
Text: Advanced Power Electronics Corp. AP1270 3A SINK/SOURCE BUS TERMINATION REGULATOR DESCRIPTIOON FEATURES Ideal for DDR-I, DDR-II and DDR-III V TT Applications Sink and Source 3A Continuous Current Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL_18,
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O-252-5L
AP1270
AP1270
1270MP
1270H
AP-127
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Untitled
Abstract: No abstract text available
Text: Technologies GmbH & Co KG Closed Loop Hall Current Sensor CYHCS-B100 This Hall Effect current sensor is based on closed loop compensating principle and can be used for measurement of DC and AC current, pulse currents etc. The output of the transducer reflects the
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CYHCS-B100
D-85464
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TO252-5
Abstract: TO263-5
Text: UNISONIC TECHNOLOGIES CO., LTD UR6515A LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR6515A is a linear regulator providing up to 3A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output
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UR6515A
UR6515A
QW-R102-044
TO252-5
TO263-5
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Untitled
Abstract: No abstract text available
Text: UNISONICTECHNOLOGIESCO., LTD UR6515A LINEAR INTEGRATED CIRCUIT 3 A DDR BU S T ERM I N AT I ON REGU LAT OR ̈ DESCRI PT I ON The UR6515A is a linear regulator providing up to 3A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output
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UR6515A
UR6515A
QW-R102-044
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mc3487
Abstract: D2578 D2678
Text: MC3487 QUAD DIFFERENTIAL LINE DRIVER WITH 3-STATE OUTPUTS SLLS098 - D2578, MAY 1980 - REVISED SEPTEMBER 1986 Meets EIA Standard RS-422-A and Federal Standard 1020 D, J, OR N PACKAGE TOP VIEW 3-State, TTL-Compatible Outputs 1A [ 1Y[ Fast Transition Times
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MC3487
SLLS098
D2578,
RS-422-A
MC3487
1N916
1N3064.
D2578
D2678
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42568
Abstract: ST 42568 C4256 A1725 42568 wp TMS4256 C4257 k a1725 THCT4502 NCP1520
Text: TEXAS 0D7tôôl IN STR , 3 T 5SE Single 5-V Power Supply — 5 % Tolerance Required for TM S4256-8 — 10% Tolerance Required for TM S4256-10, -12, -15, and TM S4257-10, -12, -15 A8[ 'D [ w [ RAS E A0[ A2[ A1[ JE D E C Standardized Pinouts Performance Ranges:
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TMS4256,
TMS4257
144-BIT
TMS4256-8
TMS4256-10,
TMS4257-10.
TMS4256/TMS4257
TMS42S7
42568
ST 42568
C4256
A1725
42568 wp
TMS4256
C4257
k a1725
THCT4502
NCP1520
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BUX83
Abstract: BUX82 gg3b
Text: TEX AS INSTR {OPTO} “§ 9 6 1 7 2 6 TEXAS b2 IN STR » riflT h lT E b 62C O P T O QG3bbb3 36663 B IIY Q 3 RI IY Q Q N-P-N SILICON POWER TRANSISTORS O CTO BE R 1 9 8 2 - R EVISED O C T O B E R 198 4 60 W at 5 0 ° C C ase Temperature 6 A Continuous Collector Current
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BUX82
BUX83
BUX83
gg3b
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Untitled
Abstract: No abstract text available
Text: SN54ALVTH16240, SN74ALVTH16240 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES138A - JULY 1998 - REVISED JANUARY 1999 • State-of-the-Art Advanced BiCMOS Technology ABT Widebus Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation
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SN54ALVTH16240,
SN74ALVTH16240
16-BIT
SCES138A
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truth table for 1 to 16 decoder
Abstract: prom 256x4 bit HD-6101 HD-6435 HD-6436 HD-6440 HD-6495 HM-6100 HM-6322 HM-6661
Text: C M O S Bus D r iv e r F a m ily HD-6435 CMOS HEX RESETTABLE LATCHED BUS D R IVER T R U T H TA B LE F U N C T IO N A L D IA G R A M FEA TU R ES C O N T R O L IN PUTS Ri • SINGLE POWER SUPPLY R2 El E2 L1 L2 H l-Z • HIGH NOISE IM M U N ITY • IN D U ST R IAL
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HD-6435
300pF
45nsec
HD-6436
OCT08
HD-6431
HD-6432
HD-6433
HD-6434
truth table for 1 to 16 decoder
prom 256x4 bit
HD-6101
HD-6440
HD-6495
HM-6100
HM-6322
HM-6661
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Untitled
Abstract: No abstract text available
Text: SN75151, SN75153 QUAD DIFFERENTIAL LINE DRIVERS WITH 3-STATE OUTPUTS SLLS082A- D2453, DECEMBER 1978 - REVISED FEBRUARY 1993 SN75151 DW OR N PACKAGE TOP VIEW * Meets EIA Standard RS-422-A * High-lmpedance Output State for Party-Line Operation * High Output Impedance in Power-Off
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SN75151,
SN75153
SLLS082A-
D2453,
RS-422-A
40-mA
SN75151
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SN72710L
Abstract: MC1013P MC680P 796HC mc1235l MC838P MC814G MC1670L 723HC 741hm
Text: 27-18 LH 0002 C LH 0002 CN 586-81! .587-270 AMPEX CURRENT A M PLIFIE R IN PUT 27-18 AMPEX REV 111 NH 0005C 586-495 D AC08CZ 587-896 27 + R ef | 1_ O PE R ATIO N AL A M PLIFIE R 8 BIT D -A CONVERTER 2" 14 13 12 11 6 5 4 1I i i i i i 3 1 13 , +12V So-4
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LH0002C
LH0002CN
NH0005C
DAC08CZ
NH0014C
DH0034
78M12HC
MMH0026CG
79M12AHC
75460BP
SN72710L
MC1013P
MC680P
796HC
mc1235l
MC838P
MC814G
MC1670L
723HC
741hm
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lh4a
Abstract: No abstract text available
Text: 74ACT11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS180 - D3908, SEPTEMBER 1991 - REVISED APRIL 1993 ' Inputs Are TTL-Voltage Compatible DW OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout a /b [ 1 1Y[ 2 2Y [ 3 g n d [ 4
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74ACT11157
SCAS180
D3908,
500-mA
300-mil
lh4a
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br1941
Abstract: COM5016 COMB116 COM8136 WD1943 trobo 7403 ITT
Text: WD1943 8136 Dual Baud Rate C lo ck FEATURES • SELEC TA B LE BAUD RATE C LO CK FREQ U EN CIES • O PERATES W ITH CRYSTA L O SCILLATO R OR EX TERN ALLY G EN ERATED FREQ UEN CY INPUT • ROM M ASKABLE FO R NON-STANDARD FREQ UEN CY SELEC TIO N S • IN TER FA C ES EA SILY W ITH MICROCOM PUTERS
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WD1943
BR1941
COM8136
COMB116
COM5016
125fC
br1941
COM5016
trobo
7403 ITT
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