S2075
Abstract: 3XT11 BLM31B601S S2075A S2075B VJ0612
Text: DEVICE SPECIFICATION FIBRE CHANNEL BIT STREAM MONITOR WITH REPEATER FIBRE CHANNEL BIT STREAM MONITOR WITH REPEATER S2075 S2075 • Switched networks • Data broadcast environments • Proprietary extended backplanes FEATURES • Repeater with parallel monitor function
|
Original
|
PDF
|
S2075
1062MHz
X3T11
S2075
3XT11
BLM31B601S
S2075A
S2075B
VJ0612
|
vouchers
Abstract: No abstract text available
Text: QR0001 QR0001 QuickRing TM Data Stream Controller Literature Number: SNOS705A October 1994 QR0001 QuickRing TM Data Stream Controller General Description Features QuickRing is a point-to-point data transfer architecture designed to facilitate high speed data streams The QuickRing
|
Original
|
PDF
|
QR0001
QR0001
SNOS705A
vouchers
|
Untitled
Abstract: No abstract text available
Text: IDT77V550 SwitchStarTM Switch Manager Features List Interprets switch command cells from external work station and loads the command into the IDT77V500 Switch Controller u Utilizes in-stream in-band signalling technique via the cell stream into the Switching Memory
|
Original
|
PDF
|
IDT77V550
IDT77V500
IDT77V550
IDT77V400
80-pin
DT80-1)
77V550
|
Untitled
Abstract: No abstract text available
Text: DSD1700 DSD 170 For most current data sheet and other product information, visit www.burr-brown.com Direct Stream Digital DSD™ Audio DIGITAL-TO-ANALOG CONVERTER TM FEATURES APPLICATIONS ● DIRECT TRANSFER OF DSD DATA STREAM TO ANALOG OUTPUT SIGNAL
|
Original
|
PDF
|
DSD1700
110dB
100kHz
28-LEAD
|
loda
Abstract: CH7304A-T-TR AN61 CH7304 CH7304A-T LVDS BT656 transmitter
Text: CH7304 Chrontel CH7304 Single LVDS Transmitter Features General Description • Single LVDS transmitter The CH7304 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs
|
Original
|
PDF
|
CH7304
CH7304
12-bit
18-bit
CH7304A-T
CH7304A-T-TR
CH7304A-TF
CH7304A-TF-TR
loda
CH7304A-T-TR
AN61
CH7304A-T
LVDS BT656 transmitter
|
DSD1700
Abstract: DSD1700E OPA134
Text: DSD1700 DSD 170 For most current data sheet and other product information, visit www.burr-brown.com Direct Stream Digital DSD™ Audio DIGITAL-TO-ANALOG CONVERTER TM FEATURES APPLICATIONS ● DIRECT TRANSFER OF DSD DATA STREAM TO ANALOG OUTPUT SIGNAL
|
Original
|
PDF
|
DSD1700
110dB
100kHz
28-LEAD
DSD1700
DSD1700E
OPA134
|
J411
Abstract: MXT4400 CRC-10 CRC-32
Text: network access products Traffic Stream Processor MXT4400 Complete Programmable Traffic Management and Internetworking Solution The MXT4400 Traffic Stream Processor TSP is the industry’s first programmable traffic management and internetworking engine to offer wire-speed performance for gigabit-scale cell
|
Original
|
PDF
|
MXT4400
MXT4400
pr000
J411
CRC-10
CRC-32
|
DSD1700
Abstract: DSD1700E OPA134 1 bit delta-sigma sacd dsd sbas132
Text: DSD1700 DSD 170 For most current data sheet and other product information, visit www.burr-brown.com Direct Stream Digital DSD™ Audio DIGITAL-TO-ANALOG CONVERTER TM FEATURES APPLICATIONS ● DIRECT TRANSFER OF DSD DATA STREAM TO ANALOG OUTPUT SIGNAL
|
Original
|
PDF
|
DSD1700
110dB
100kHz
28-LEAD
DSD1700
DSD1700E
OPA134
1 bit delta-sigma sacd dsd
sbas132
|
pn8024
Abstract: V550 data sheet IDT77V400 IDT77V500 IDT77V550 RC32364 RC4640 RC4650 RC64474 RC64475
Text: IDT77V550 SwitchStarTM Switch Manager HDWXU WXUHV /LVW Interprets switch command cells from external work station and loads the command into the IDT77V500 Switch Controller Utilizes in-stream in-band) signalling technique via the cell stream into the Switching Memory
|
Original
|
PDF
|
IDT77V550
IDT77V550
IDT77V500
Man77V550
80-pin
DT80-1)
77V550
pn8024
V550 data sheet
IDT77V400
RC32364
RC4640
RC4650
RC64474
RC64475
|
DSD1700
Abstract: DSD1700E OPA134
Text: DSD1700 DSD 170 For most current data sheet and other product information, visit www.burr-brown.com Direct Stream Digital DSD™ Audio DIGITAL-TO-ANALOG CONVERTER TM FEATURES APPLICATIONS ● DIRECT TRANSFER OF DSD DATA STREAM TO ANALOG OUTPUT SIGNAL
|
Original
|
PDF
|
DSD1700
110dB
100kHz
28-LEAD
DSD1700
DSD1700E
OPA134
|
Untitled
Abstract: No abstract text available
Text: TSP3 Traffic Stream Processor M27482 622 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27482 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking
|
Original
|
PDF
|
M27482
M27482
|
RFC-2684
Abstract: tcam RFC2684
Text: TSP3 Traffic Stream Processor M27482 622 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27482 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking
|
Original
|
PDF
|
M27482
M27482
RFC-2684
tcam
RFC2684
|
simple switch block diagram
Abstract: 77V400 77V550 IDT77V400 IDT77V500 IDT77V550 QFP80 42mr DT80-1
Text: IDT77V550 SwitchStarTM Switch Manager Features List Interprets switch command cells from external work station and loads the command into the IDT77V500 Switch Controller u Utilizes in-stream in-band signalling technique via the cell stream into the Switching Memory
|
Original
|
PDF
|
IDT77V550
IDT77V500
IDT77V550
80-pin
DT80-1)
77V550
simple switch block diagram
77V400
IDT77V400
QFP80
42mr
DT80-1
|
74H 14
Abstract: 74h14 CH7305 AN61 HSYNC, VSYNC, DE loda "DUAL LVDS"
Text: CH7305 Chrontel CH7305 Single/Dual LVDS Transmitter Features General Description • Single / Dual LVDS transmitter The CH7305 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs
|
Original
|
PDF
|
CH7305
CH7305
12-bit
24-bit
18-bit
CH7305A-TF
74H 14
74h14
AN61
HSYNC, VSYNC, DE
loda
"DUAL LVDS"
|
|
|
Untitled
Abstract: No abstract text available
Text: TSP3 Traffic Stream Processor M27481 310 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27481 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking
|
Original
|
PDF
|
M27481
M27481
27481-BRF-001-A
M03-0876
|
Untitled
Abstract: No abstract text available
Text: TSP3 Traffic Stream Processor M27480 155 Mbps Programmable Traffic Management and Layer 2 Interworking Processor The M27480 is based on a third-generation traffic stream processor architecture TSP3 and is targeted for a variety of programmable traffic management and Layer 2 interworking
|
Original
|
PDF
|
M27480
M27480
27480-BRF-001-A
M03-0877
|
Untitled
Abstract: No abstract text available
Text: CH7305 Chrontel CH7305 Single/Dual LVDS Transmitter Features General Description • Single / Dual LVDS transmitter The CH7305 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs
|
Original
|
PDF
|
CH7305
CH7305
24-bit
18-bit
64-pin
12-bit
CH7305A-T
CH7305A-T-TR
|
Untitled
Abstract: No abstract text available
Text: CH7305A Chrontel CH7305A Single/Dual LVDS Transmitter Features General Description • Single / Dual LVDS transmitter The CH7305A is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream
|
Original
|
PDF
|
CH7305A
CH7305A
12-bit
24-bit
18-bit
18-bi
CH7305AA-TF
|
Untitled
Abstract: No abstract text available
Text: CH7304 Chrontel Advance Information Chrontel CH7304 Single LVDS Transmitter Features General Description • Single LVDS transmitter The CH7304 is a Display Controller device, which accepts a graphics data stream over one 12-bit wide variable voltage 1.1V to 3.3V port. The data stream outputs
|
Original
|
PDF
|
CH7304
CH7304
12-bit
18-bit
|
design of scrambler and descrambler
Abstract: Scrambler DP83257VF C1995 DP83222 DP83223 DP83231 DP83251 DP83256 DP83256VF-AP
Text: DP83222 CYCLONE TM Twisted Pair FDDI Stream Cipher Device General Description Features The DP83222 CYCLONE Stream Cipher Scrambler Descrambler Device is an integrated circuit designed to interface directly with the serial bit streams of a Twisted Pair FDDI PMD The DP83222 is designed to be fully compatible
|
Original
|
PDF
|
DP83222
DP83222
DP83223
design of scrambler and descrambler
Scrambler
DP83257VF
C1995
DP83231
DP83251
DP83256
DP83256VF-AP
|
TNETA1622
Abstract: XTNETA1622DW
Text: TNETA1622 622.08-MHz CLOCK-RECOVERY DEVICE SDNS017C – FEBRUARY 1994 – REVISED DECEMBER 1995 D D D Recovers a 622.08-MHz Clock Signal From a 622.08-Mbit /s STS-12/STM-4 NRZ Data Stream Accepts Pseudo-ECL PECL Input Voltage Levels on the Input Data Stream
|
Original
|
PDF
|
TNETA1622
08-MHz
SDNS017C
08-Mbit
STS-12/STM-4
TNETA1622
STS-12/STM-4
XTNETA1622DW
|
TNETA1622
Abstract: No abstract text available
Text: TNETA1622 622.08-MHz CLOCK-RECOVERY DEVICE SDNS017C – FEBRUARY 1994 – REVISED DECEMBER 1995 D D D Recovers a 622.08-MHz Clock Signal From a 622.08-Mbit /s STS-12/STM-4 NRZ Data Stream Accepts Pseudo-ECL PECL Input Voltage Levels on the Input Data Stream
|
Original
|
PDF
|
TNETA1622
08-MHz
SDNS017C
08-Mbit
STS-12/STM-4
TNETA1622
STS-12/STM-4
|
TNETA1622
Abstract: No abstract text available
Text: TNETA1622 622.08ĆMHz CLOCKĆRECOVERY DEVICE SDNS017C − FEBRUARY 1994 − REVISED DECEMBER 1995 D Recovers a 622.08-MHz Clock Signal From D D a 622.08-Mbit /s STS-12/STM-4 NRZ Data Stream Accepts Pseudo-ECL PECL Input Voltage Levels on the Input Data Stream
|
Original
|
PDF
|
TNETA1622
08MHz
SDNS017C
08-MHz
08-Mbit
STS-12/STM-4
TNETA1622
STS-12/STM-4
|
nrzi to nrz circuit diagram
Abstract: nrz to nrzi decoder LG Semicon player
Text: DP83222 Nat ional Semiconductor DP83222 CYCLONE Twisted Pair FDDI Stream Cipher Device General Description Features The DP83222 CYCLONE Stream Cipher Scrambler/ Descrambler Device Is an integrated circuit designed to In terface directly with the serial bit streams of a Twisted Pair
|
OCR Scan
|
PDF
|
DP83222
DP83222
DP83223
16-Lead
DM7442AN
nrzi to nrz circuit diagram
nrz to nrzi decoder
LG Semicon player
|
