SUITE MASTER Search Results

SUITE MASTER Result Highlights (5)

Part	ECAD Model	Manufacturer	Description	Download	Buy
54L72J		Rochester Electronics LLC	54L72 - AND-OR Gated JK Master-Slave FFpst
54H78FM		Rochester Electronics LLC	54H78 - Jbar-Kbar Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDFP14
54H71DM		Rochester Electronics LLC	54H71 - J-K Flip-Flop, 1-Func, Master-slave Triggered, TTL, CDIP14
MC1214L		Rochester Electronics LLC	MC1214 - R-S Flip-Flop, 2-Func, Master-slave Triggered, ECL, CDIP14
54F273/QSA		Rochester Electronics LLC	54F273 - Flip-Flop, D-Type, 8-Bit, Edge-Triggered, With Asynchronous Master Reset - Dual marked (5962-8855001SA)

SUITE MASTER Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
TIBPAL22VP10-20C Abstract: No abstract text available Text: TIBPAL22VP10-20C, TIBPAL22VP10-25M HIGH-PERFORMANCE IMPACT-X  PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPS013 – D2943, FEBRUARY 1987 – REVISED JUNE 1991 • • • • • • • • CLK/I I I I I I I I I I I GND Choice of Operating Speeds: TIBPAL22VP10-20C . . . 20 ns Max	Original	TIBPAL22VP10-20C, TIBPAL22VP10-25M SRPS013 D2943, TIBPAL22V10/10A, TIBPAL22VP10-20C TIBPAL22VP10-25M TIBPAL22VP10-20C	PDF
BCM1190 Abstract: No abstract text available Text: BCM1190 LOW-COST IP PHONE CHIP SUMMARY OF BENEFITS FEATURES BCM1190 is the world’s most highly integrated and cost-effective IC for low-cost, feature rich, high quality Ethernet IP phone products. • The BCM1190 integrates: • Enhanced MIPS32 CPU with DSP instruction set	Original	BCM1190 BCM1190 MIPS32 10/100/BASE-T 208-pin 1190-PB00-R	PDF
working of 5 pen pc technology Abstract: architecture of 5 pen pc technology only 5 PEN PC TECHNOLOGY 0945F Text: Features • Utilizes the AVR RISC Architecture • AVR – High-performance and Low-power RISC Architecture • • • • • • • • – 121 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General-purpose Working Registers + Peripheral Control Registers	Original	0945FS 11/00/xM working of 5 pen pc technology architecture of 5 pen pc technology only 5 PEN PC TECHNOLOGY 0945F	PDF
avr 328 Abstract: 2490F M103C Text: Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers	Original	2490F avr 328 M103C	PDF
AT56C55 Abstract: Rabbit-3000 schematic diagram Rabbit-3000-based pin diagram for core i7 processor AT56C55-IZ1T Z80 i2c INTERFACING TECHNIQUES data circuit schematics satellite connector rabbit processor 3000 embedded schematics z80 rabbit processor introduction Text: Rabbit 3000 Microprocessor Data Sheet Rabbit 3000 Microprocessor Data Sheet Printed in U.S.A. 2002 Rabbit Semiconductor • All rights reserved. Rabbit Semiconductor reserves the right to make changes and improvements to its products without providing notice.	Original	3000TM RJ-45 AT56C55 Rabbit-3000 schematic diagram Rabbit-3000-based pin diagram for core i7 processor AT56C55-IZ1T Z80 i2c INTERFACING TECHNIQUES data circuit schematics satellite connector rabbit processor 3000 embedded schematics z80 rabbit processor introduction	PDF
pcf8576 Abstract: 14-SEGMENT DIP40 PCF8566 PCF8566P PCF8566T PCF8576C VSO40 MGG387 Text: INTEGRATED CIRCUITS DATA SHEET PCF8566 Universal LCD driver for low multiplex rates Product specification Supersedes data of 1997 Apr 02 File under Integrated Circuits, IC12 1998 May 04 Philips Semiconductors Product specification Universal LCD driver for low multiplex	Original	PCF8566 SCA59 415106/1200/06/pp40 pcf8576 14-SEGMENT DIP40 PCF8566 PCF8566P PCF8566T PCF8576C VSO40 MGG387	PDF
Untitled Abstract: No abstract text available Text: CH7008A Chrontel CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Support for low voltage interface to VGA controller • Universal digital interface accepts YCrCb CCIR656 or RGB (15, 16 or 24-bit multiplexed) video data in	Original	CH7008A CCIR656) 24-bit	PDF
Untitled Abstract: No abstract text available Text: XRT75L06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR OCTOBER 2003 REV. 1.0.2 GENERAL DESCRIPTION The XRT75L06 is a six Interface Unit LIU for The LIU incorporates Transmitters and Jitter Lead BGA package. attenuator performance meets the ETSI TBR-24 and	Original	XRT75L06 XRT75L06 TBR-24 GR-499	PDF
PN 0506 b4 Abstract: No abstract text available Text: CH7013B Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan	Original	CH7013B CCIR601 24-bit) CH7013B-DF CH7013B-DF-TR CH7013B-GF CH7013B-GF-TR PN 0506 b4	PDF
S1C8F360 Abstract: E0C88104 E0C88112 E0C88316 E0C88317 E0C88348 S1C88348 Text: MF1215-02 CMOS 8-BIT SINGLE CHIP MICROCOMPUTER S1C88832/88862 Technical Manual S1C88832/88862 Technical Hardware NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any	Original	MF1215-02 S1C88832/88862 S1C88832/88862 S1C8F360 E0C88104 E0C88112 E0C88316 E0C88317 E0C88348 S1C88348	PDF
a13h Abstract: No abstract text available Text: CH7017A Chrontel CH7017 TV Encoder / LVDS Transmitter Features 1.0 General Description TV-Out: • VGA to TV conversion supporting up to 1024x768 pixels. • Macrovision 7.1.L1 copy protection support. • Two variable-voltage digital input ports. • Simultaneous LVDS and TV output.	Original	CH7017A CH7017 1024x768 CH7017A-T a13h	PDF
USC32 Abstract: No abstract text available Text: CH7018A Chrontel CH7018A TV Encoder / LVDS Transmitter Features 1.0 General Description TV-Out: • VGA to TV conversion supporting up to 1024x768 pixels. • CH7018A is non- Macrovision version . • Two variable-voltage digital input ports. • Simultaneous LVDS and TV output.	Original	CH7018A CH7018A 1024x768 CH7018A-TF CH7018A-TF-TR USC32	PDF
r72v17 Abstract: hs 7461 S1R72V17B00B S1R72V17B05Q 63936-1 S1R72 usb/usb/str 7656 Text: S1R72V17*Q Technical Manual Rev.1.5 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any	Original	S1R72V17* acco1295-750-216/ r72v17 hs 7461 S1R72V17B00B S1R72V17B05Q 63936-1 S1R72 usb/usb/str 7656	PDF
epson stylus t13 circuit diagram Abstract: schematic diagram crt tv sharp 2x20 lcd display S1D13806F00 M9 developer kit liteon power supply PC K2DB S1D13806F00A EB 203 D Text: S1D13806 Embedded Memory Display Controller S1D13806 TECHNICAL MANUAL Document Number: X28B-Q-001-05 Copyright 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in	Original	S1D13806 X28B-Q-001-05 X28B-G-014-01 epson stylus t13 circuit diagram schematic diagram crt tv sharp 2x20 lcd display S1D13806F00 M9 developer kit liteon power supply PC K2DB S1D13806F00A EB 203 D	PDF

Intel overdrive Abstract: No abstract text available Text: in t e i Intel486 SX M ICROPROCESSOR IM PORTANT— Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes the Intel486 SX microprocessor, the Intel OverDrive™ Processor, and the l n t e l 4 8 7 TM S X Math Coprocessor. All normal text describes the functionality for the Intel486 SX microproces	OCR Scan	Intel486â Intel486 Intel487 240950-D3 Intel overdrive	PDF
lds 7 segment LDS 5161 AK Abstract: 24C01C-I/led 7 segment LDS 5161 AK 12/led 7 segment LDS 5161 AK 24aa32aft-i/lds 7 segment LDS 5161 AK -20/led 7 segment LDS 5161 AH Text: intei i486 MICROPROCESSOR • High Performance Design — Frequent Instructions Execute in One Clock — 25 MHz and 33 MHz Clock Frequencies — 80 and 106 Mbyte/Sec Burst Bus — CHMOS IV Process Technology — Dynamic Bus Sizing for 8-, 16- and 32-Bit Busses	OCR Scan	32-Bit lds 7 segment LDS 5161 AK 24C01C-I/led 7 segment LDS 5161 AK 12/led 7 segment LDS 5161 AK 24aa32aft-i/lds 7 segment LDS 5161 AK -20/led 7 segment LDS 5161 AH	PDF