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    SY100S391DC Search Results

    SY100S391DC Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SY100S391DC Synergy Semiconductor LOW-POWER HEX TTL-TO-PECL TRANSLATOR Scan PDF
    SY100S391DC Synergy Semiconductor LOW-POWER HEX TTL-TO-PECL TRANSLATOR Scan PDF
    SY100S391DC Synergy Semiconductor LOW-POWER HEX TTL-TO-PECL TRANSLATOR Scan PDF

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    Untitled

    Abstract: No abstract text available
    Text: « LOW-P'OWERHEX TTL-TO-PECL TRANSLATOR SYNERGY PRELIMINARY SY100S391 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logiclevels. Theunique feature of this translator is the ability to do this translation


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    PDF SY100S391 SY100S391 SY100S391DC D24-1 SY100S391FC F24-1 SY100S391JC

    wo-04

    Abstract: F100K SY100S391 SY100S391DC SY100S391FC
    Text: LOW-POWER HEX TTL-TO-PECL TRANSLATOR r c ^ L . I riM lM o LA I U r i SYNERGY SEMICONDUCTOR FEATURES SY100S391 DESCRIPTION • Operates from a single +5V supply ■ Differential PECL outputs ■ ESD protection of 2000V The SY100S391 is a hex TTL-to-PECL translator for


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    PDF SY100S391 SY100S390 F100K SY100S391 CI013fl SY100S391DC D24-1 SY100S391FC wo-04 F100K

    F100K

    Abstract: SY100S391 diode d4c Vcc-1035
    Text: * LOW-POWER HEX TTL-TO-PECL TRANSLATOR SYNERGY SY100S391 S E M IC O N D U C T O R DESCRIPTION FEATURES The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this


    OCR Scan
    PDF SY1005391 SY100S390 F100K SY100S391 T0D13Ã SY100S391 00D234D SY100S391DC D24-1 F100K diode d4c Vcc-1035

    Untitled

    Abstract: No abstract text available
    Text: * SYNERGY LO W -PO W ER HEX T T L -T O -P E C L T R A N S LA T O R SY100S391 SEMICONDUCTOR DESCRIPTION FEATURES Operates from a single +5V supply Differential PECL outputs Companion chip to SY100S390 PECL-to-TTL translator Function and pinout compatible with National and


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    PDF SY100S391 SY100S390 F100K 24-pin 28-pin SY100S391

    BY 143

    Abstract: Synergy SY100S391 SY100S391DC SY100S391JC
    Text: This Material Copyrighted By Its Respective Manufacturer This Material Copyrighted By Its Respective Manufacturer This Material Copyrighted By Its Respective Manufacturer *SYNE R G Y PRELIMINARY SY100S391 SEM IC O N D U C TO R T IM IN G D IA G R A M Propagation Delay and Transition Times


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    PDF SY100S391 T0G13Ã CI00CH57 SY100S391DC D24-1 SY100S391 F24-1 SY100S391JC J28-1 BY 143 Synergy

    Untitled

    Abstract: No abstract text available
    Text: * _ SYNERGY L O W -P O W E R H E X PRELIMINARY SY100S391 TTL-TO-PECL TRANSLATOR SEMICONDUCTOR DESCRIPTION FEATU R ES The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this translation


    OCR Scan
    PDF SY100S391 SY100S391 SY100S391DC D24-1 SY100S391FC F24-1 SY100S391JC

    Untitled

    Abstract: No abstract text available
    Text: * LOW-POWER HEX TTL-TO-PECL TRANSLATOR SYNERGY SY100S391 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this


    OCR Scan
    PDF SY100S391 SY100S391 SY100S391DC D24-1 SY100S391FC F24-1 SY100S391JC