Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    SYM 111H Search Results

    SYM 111H Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    87185-111HLF Amphenol Communications Solutions BergStik® 2.54mm, Board to Board connector, Unshrouded Header, Through Hole, Single Row, 11 Positions, 2.54 mm Pitch, Vertical, 26.49 mm (1.043in) Mating, 2.41 mm (0.095in) Tail. Visit Amphenol Communications Solutions
    68024-111HLF Amphenol Communications Solutions BergStik® 2.54mm, Board to Board connector, Unshrouded Header, Through Hole, Single Row, 11 Positions, 2.54 mm Pitch, Vertical, 8.08 mm (0.318in) Mating, 3.81 mm (0.15in) Tail. Visit Amphenol Communications Solutions
    78208-111HLF Amphenol Communications Solutions PV Shrouded Header, Wire to Board connector, 2 Wall Shrouded Header - Through Hole - Single row - 11 Positions 2.54mm - Right Angle. Visit Amphenol Communications Solutions
    68031-111HLF Amphenol Communications Solutions BergStik® 2.54mm, Board to Board connector, Unshrouded Header, Through Hole, Single Row, 11 Positions, 2.54 mm Pitch, Vertical, 5.84 mm (0.23in) Mating, 4.65 mm (0.183in) Tail. Visit Amphenol Communications Solutions
    69167-111HLF Amphenol Communications Solutions PV Shrouded Header, Wire to Board connector, 2 Wall Shrouded Header - Through Hole - Single row - 11 Positions 2.54mm - Vertical. Visit Amphenol Communications Solutions

    SYM 111H Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    KS88-SERIES

    Abstract: "Frequency Dividers" KS88C2064 SM6309
    Text: KS88C2064 1 PRODUCT OVERVIEW PRODUCT OVERVIEW KS88-SERIES MICROCONTROLLERS Samsung’s KS88 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:


    Original     		PDF KS88C2064 KS88-SERIES KS88C2064 TB882064A SEG64 SEG62 SEG60 SEG58 SEG56 SEG54 "Frequency Dividers" SM6309

    DW 5255 S2

    Abstract: BUZ 95 TB820 S3C8-Series
    Text: S3C820B 1 PRODUCT OVERVIEW PRODUCT OVERVIEW S3C-SERIES MICROCONTROLLERS Samsung’s S3C8-series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:


    Original     		PDF S3C820B S3C820B SEG64 SEG62 SEG60 SEG58 SEG56 SEG54 SEG52 SEG50 DW 5255 S2 BUZ 95 TB820 S3C8-Series

    BC1211

    Abstract: No abstract text available
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		PDF ZL50012 512-ch BC1211

    MS-026

    Abstract: ZL50012 TFPW0 sto8b
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		PDF ZL50012 512-ch STi0-15 IEEE-1149 STo0-15 STOHZ0-15 MS-026 ZL50012 TFPW0 sto8b

    DS5722

    Abstract: No abstract text available
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		PDF ZL50012 512-ch 048Mb/s, 096Mb/s 192Mb/s DS5722

    MS-026

    Abstract: ZL50012
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		PDF ZL50012 512-ch ZL50012/QCC ZL50012/GDC MS-026 ZL50012

    MS-026

    Abstract: ZL50012 philips e3 STO11 ci 116h 4094m
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		PDF ZL50012 512-ch STi0-15 IEEE-1149 STo0-15 STOHZ0-15 MS-026 ZL50012 philips e3 STO11 ci 116h 4094m

    ZL50012QCG1

    Abstract: MS-026 ZL50012 STO10
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features • April 2006 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		PDF ZL50012 512-ch ZL50012/QCC ZL50012/GDC ZL50012QCG1 ZL50012GDG2 ZL50012QCG1 MS-026 ZL50012 STO10

    GR-1244-CORE

    Abstract: MS-026 ZL50011
    Text: ZL50011 Flexible 512-ch DX with on-chip DPLL Data Sheet Features VDD • • • Applications • • • • • Small and medium digital switching platforms Access Servers Time Division Multiplexers Computer Telephony Integration Digital Loop Carriers VSS


    Original     		PDF ZL50011 512-ch STi0-15 GR-1244-CORE MS-026 ZL50011

    Untitled

    Abstract: No abstract text available
    Text: REVISIONS APPROVED SYM DISCRETION DATE APPROVED 01/JU N /05’ A CONNIE A ‘ ‘ CUSTOMER DRAWING FOR REFERANCE ONLY, SAMPLES APPROVAL ARE REQUIRED!! V1.1 I PAGE 1 / 5 I NOTE: THIS DEVICE IS ROHS COMPLIANT. SYM A A DISCRETION NOTE ROHS STANDARD DATE 139.45


    OCR Scan     		PDF 01/JU 1111111111111In 111n1111111111111n1111111n111111 KEY49 184PIN 20/NOV/03â Pr184G

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY I^ IIC R O N 2 M EG DRAM Il Jl X MT9LD272 X 72 DRAM M ODULE 2 MEG x 72 r \ I 11 C 16 MEGABYTE, ECC, 3.3V, FAST PAGE OR EDO PAGE MODE IV IU U U L t FEATURES PIN ASSIGNMENT (Front View) • JEDEC-standard ECC pinout in a 168-pin, dual-in-line memory module (DIMM)


    OCR Scan     		PDF MT9LD272 168-pin, 048-cycle MT9LD272IX)

    HS253

    Abstract: No abstract text available
    Text: ADE-206-001 C H Feb. 1990 HG 62 E SERIES (H itachi C M O S Gate Array) 0 H IT A C H I The HG62E series is a master slice CMOS gate array o f w hich the gate length is 1 fim and uses 2-layer metal interconnect technology. Auto-diagnosis is a typical feature o f HG62E


    OCR Scan     		PDF ADE-206-001 HG62E HG62E ADE-206-001C HS253

    Untitled

    Abstract: No abstract text available
    Text: œ HARRIS S E M I C O N D U C T O R H S P 4 3 1 6 8 Dual FIR Filter December 1996 Features Description • Two Independent 8-Tap FIR Filters Configurable as a Single 16-Tap FIR The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16


    OCR Scan     		PDF 16-Tap HSP43168 1-800-4-HARRIS

    HS173

    Abstract: KCC CL-30 HG62E11 HS153 TTL 74 series HS135 HS153 sn j hs-135 HG62E33 HG62E08
    Text: A D E - 2 0 6 - 0 0 1 C H Feb. 1 9 9 0 HG62E SERIES (H itachi C M O S Gate A rray) H IT A C H I The HG 62E series is a master slice CMOS gate array o f w h ich the gate length is 1 fim and uses 2-layer metal interconnect technology. Auto-diagnosis is a typ ica l feature o f HG 62E


    OCR Scan     		PDF ADE-206-001 HG62E ADE-206-001C HS173 KCC CL-30 HG62E11 HS153 TTL 74 series HS135 HS153 sn j hs-135 HG62E33 HG62E08

    Untitled

    Abstract: No abstract text available
    Text: STI7232205D2I-XXVG 168-PIN DIMMS 32M X 72 Bit DRAM DIMM Optimized for ECC FEATURES GENERAL DESCRIPTION • The Simple Technology STI7232205D2l-xxVG is an 32M x 72 bit Dynamic RAM high density memory module The module consists of thirty-six 16M x 4 bit DRAMs in 32-pin TSOP


    OCR Scan     		PDF STI7232205D2I-XXVG -60VG -70VG 110ns 130ns 168-PIN STI7232205D2l-xxVG 32-pin 168pin

    HA17012

    Abstract: HA17012G Digital to analog converter HA17012 7082 B amplifier HA17012B HA17012C HA17012P 3999
    Text: , n M i / u # 1 2-bit Multiplying Digital-to-Analog Converter H A 1 7 0 1 2 is a m o n o lith ic high speed m ultip lying D /A co n ­ verter w hich provides 12-bit resultion and cu rrent output. It is divided into tw o groups according to the accu racy o f


    OCR Scan     		PDF 12-bit HA17012 250ns Am6012 HA17012B HA17012C HA17012P, HA17012G HA17012G Digital to analog converter HA17012 7082 B amplifier HA17012P 3999

    FO 103H

    Abstract: 1C11Ae
    Text: f f t H U S E M I C O N D U C T O R v A R R HSP43168 I S Dual FIR Filter January 1994 Features Description • Two Independent 6-Tap FIR Filters Configurable as a Single 16-Tap FIR The HSP43168 Dual FIR Filter consists of tw o Independent 8-tap FIR filters. Each filter supports decim ation from 1 to 16


    OCR Scan     		PDF HSP43168 HSP43168 FO 103H 1C11Ae

    Untitled

    Abstract: No abstract text available
    Text: HSP43168 HARRIS S E M I C O N D U C T O R Dual FIR Filter December 1996 Features Description • Two Independent 8-Tap FIR Filters Configurable as a Single 16-Tap FIR The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16


    OCR Scan     		PDF HSP43168 16-Tap HSP43168 1-800-4-HARRIS

    3350c

    Abstract: data flow diagrams 4009A Tf11T HSP43168
    Text: H S P 43168 HARRIS Dual FIR Filter November 1991 F e a tu re s D e s c rip tio n • Two The H SP 43168 Dual FIR Filter consists o f tw o independent 8 -ta p FIR filters. Each filter supports decim ation from 1 to 16 and provides o n -b o a rd storage fo r 3 2 sets o f coefficients. The B lo ck Diagram shows


    OCR Scan     		PDF HSP43168 16-Tap 16x16 33MHz, 45MHz 85-Pin 84-Pin HSP43168 3350c data flow diagrams 4009A Tf11T

    DN74LS02

    Abstract: MA161 dn74LS02 PIN
    Text: LS T T L DN74LS Series DN 74LS02 DN74LS02 DN 74- l S 0 2, Quad 2-input P o s itiv e NOR Gates • Description D N 7 4 L S 0 2 contains four 2-input positive isolation N O R gate circuits. ■ Features • L o w pow er consum ption P d = 1 lm W ty p ica l


    OCR Scan     		PDF DN74LS DN74LS02 DN74LS02 14-pin SO-14D) MA161. MA161 dn74LS02 PIN

    DQ380

    Abstract: U4 Package ADQ36
    Text: STI644006UD2-1OVG 168-PIN DIMMS 4M X 64 Bits SDRAM Unbuffered DIM M FEATURES GENERAL DESCRIPTION • Maximum frequency=100MHz tcc=10ns • Burst Mode Operation • Auto and self refresh capability (4096 cycles/64ms refresh) • • LVTTL compatible inputs and outputs


    OCR Scan     		PDF STI644006UD2-1OVG 100MHz cycles/64ms 168-PIN STI644006UD2-10VG STI644006UD2-1 50-pin 400-mil DQ380 U4 Package ADQ36

    SM 1-12H

    Abstract: 29057 29058 1008HA 16EH00
    Text: ADVANCE INFORMATION SERIES 100 FLASH MEMORY MINIATURE CARD Ì F M 0 0 2 A , ÌF M 0 0 4 A • Low-Cost Linear Flash Card ■ Miniature Card Specification Compliant ■ Single Supply SmartVoltage Operation — 5V or 3.3V Read/Write ■ Fast Read Performance


    OCR Scan     		PDF 28F008SC FM004A, AP-360 28F008SA SM 1-12H 29057 29058 1008HA 16EH00

    Untitled

    Abstract: No abstract text available
    Text: 93C95 ATM 25.6 MB Transceiver , _ , _ , _ and Data Recovery 1C Technology, Incorporated ADVANCED DATA August 1995 Features Description • Integrated A TM25 PMD Sublayer The 93C95 is a highly integrated analog interface 1C for


    OCR Scan     		PDF 93C95 93C95 MD400148/â 000S043

    101ZZ

    Abstract: m1s23 PDCR 900 TLCS-900 TMP94C241C TMP94C241CF M2S22 PDCR 940 MNS20 B5WR
    Text: TOSHIBA TMP94C241C CMOS 32-bit Microcontroller TMP94C241CF 1. O u t lin e an d Device Characteristics TMP94C241C is high-speed advanced 32-bit micro-controller developed for controlling equipment which processes mass data. TMP94C241C is a micro-controller which has a high-performance CPU 900/H2 CPU and various


    OCR Scan     		PDF TMP94C241C 32-bit TMP94C241CF TMP94C241C 900/H2 160-pin 101ZZ m1s23 PDCR 900 TLCS-900 TMP94C241CF M2S22 PDCR 940 MNS20 B5WR