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    SYNC SLICER Search Results

    SYNC SLICER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-USB2AMBMMC-001 Amphenol Cables on Demand Amphenol CS-USB2AMBMMC-001 Amphenol USB 2.0 High Speed Certified [480 Mbps] USB Type A to Micro B Cable - USB 2.0 Type A Male to Micro B Male [Android Sync + 28 AWG Fast Charge Ready] 1m (3.3') Datasheet
    CS-USB3IN1WHT-000 Amphenol Cables on Demand Amphenol CS-USB3IN1WHT-000 3-in-1 USB 2.0 Universal Apple/Android Charge & Sync Cable Adapter - USB Type A Male In - Apple Lightning (8-Pin) / Apple 30-Pin / USB Micro-B (Android) Male Out - White Datasheet
    CS-USB2AMBMMC-002 Amphenol Cables on Demand Amphenol CS-USB2AMBMMC-002 Amphenol USB 2.0 High Speed Certified [480 Mbps] USB Type A to Micro B Cable - USB 2.0 Type A Male to Micro B Male [Android Sync + 28 AWG Fast Charge Ready] 2m (6.6') Datasheet
    54S163J/B Rochester Electronics LLC 54S163 - Synchronous 4-Bit Counters Visit Rochester Electronics LLC Buy
    74167N-ROCS Rochester Electronics 74167 - Sync Decade Rate Multipliers Visit Rochester Electronics Buy

    SYNC SLICER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    K14X

    Abstract: analog devices 751n MC44145
    Text: MC44145 Pixel Clock Generator/ Sync Separator The MC44145, Pixel Clock Generator, is a component of the MC44000 family. The MC44145 contains a sync separator with composite sync and vertical outputs, and clock generation circuitry for the digitization of any video signal


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    PDF MC44145 MC44145, MC44000 MC44145 K14X analog devices 751n

    Composite Sync

    Abstract: 625p MAX9568 Sync pll tv pulse generator E16-1 MMBT3904 HDTV sync generator 12 282 19 MAX9566
    Text: 19-4103; Rev 1; 12/08 KIT ATION EVALU E L B A IL AVA Component Analog TV Sync Separator Features The MAX9568 video sync separator extracts sync timing information from standard-definition SDTV , extendeddefinition (EDTV), and high-definition (HDTV) component


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    PDF MAX9568 MAX9568 MAX9566, MAX9567, MAX9569 Composite Sync 625p Sync pll tv pulse generator E16-1 MMBT3904 HDTV sync generator 12 282 19 MAX9566

    HDTV sync generator

    Abstract: max9566
    Text: 19-4103; Rev 0; 5/08 Component Analog TV Sync Separators Features The MAX9566MAX9569 family of video sync separators extract sync timing information from standard-definition SDTV , extended-definition (EDTV), and high-definition (HDTV) component video signals. These devices are


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    PDF MAX9566 MAX9569 MAX9569 MAX9566/MAX9567/MAX9569 MAX9568 16-pin T833-2 HDTV sync generator

    SAA4700T

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET SAA4700T VPS dataline processor Preliminary specification File under Integrated Circuits, IC02 March 1991 Philips Semiconductors Preliminary specification VPS dataline processor SAA4700T FEATURES GENERAL DESCRIPTION • Adaptive sync slicer with buffered composite sync


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    PDF SAA4700T SAA4700T

    MC44000

    Abstract: MC44145D MC44011 MC44145 MC44250 Gardner "frequency comparator" composite video converter to R G B pixel clock generator ttl MC4425
    Text: Order this document by MC44145/D MC44145 Pixel Clock Generator/ Sync Separator The MC44145, Pixel Clock Generator, is a component of the MC44000 family. The MC44145 contains a sync separator with composite sync and vertical outputs, and clock generation circuitry for the digitization of any video signal


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    PDF MC44145/D MC44145 MC44145, MC44000 MC44145 MC44145/D* MC44000 MC44145D MC44011 MC44250 Gardner "frequency comparator" composite video converter to R G B pixel clock generator ttl MC4425

    SAA4700T

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET SAA4700T VPS dataline processor Preliminary specification File under Integrated Circuits, IC02 March 1991 Philips Semiconductors Preliminary specification VPS dataline processor SAA4700T FEATURES GENERAL DESCRIPTION • Adaptive sync slicer with buffered composite sync


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    PDF SAA4700T SAA4700T

    video transmitter

    Abstract: NTE1632 video sync detector flyback Horizontal frequency kHz 15.625
    Text: NTE1632 Integrated Circuit Vertical/Horizontal Sync Separator Description: The NTE1632 separates the horizontal and vertical sync pulses from the composite TV video signal and uses them to synchronize vertical and horizontal oscillators. The NTE1632 is supplied in a


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    PDF NTE1632 NTE1632 18-Lead video transmitter video sync detector flyback Horizontal frequency kHz 15.625

    MIPI 1080p LCD

    Abstract: single chip converter for HDMI to cvbs
    Text: Integrated Video Decoder and HDMI Receiver ADV7482 Data Sheet FEATURES Component video processor Any-to-any 3 x 3 color space conversion CSC matrix Contrast/brightness/hue/saturation video adjustment Timing adjustments controls for horizontal sync (HS)/vertical sync (VS)/data enable (DE) timing


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    PDF ADV7482 D12047-0-6/14 MIPI 1080p LCD single chip converter for HDMI to cvbs

    Untitled

    Abstract: No abstract text available
    Text: FUNCTIONAL BLOCK DIAGRAM FEATURES 170 MSPS maximum conversion rate 500 MHz programmable analog bandwidth 0.5 V to 1.0 V analog input range Less than 450 ps p-p PLL clock jitter at 170 MSPS 3.3 V power supply Full sync processing Sync detect for hot plugging


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    PDF 128-Lead S-128-1) AD9888KSZ-100 AD9888KSZ-140 AD9888KSZ-170 D02442-0-12/11 S-128-1

    BP2325

    Abstract: HMS91C7134 80C51 HMS91C7134K HMS97C7134
    Text: HMS91C7134 HMS91C7134 CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR MONITOR 1. OVERVIEW 1.1 Description The HMS9xC7134 is a single-chip microcontroller of the 80C51 family, which is dedicated for monitor application. It is particularly suitable for multi-sync computer monitor controller. This contains DDC interfaces to the PC host, sync-detector and sync-processor for autosync application, ADC, static PWM, dynamic PWM and I2C bus interface for control of the video and deflection functions of the monitor.


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    PDF HMS91C7134 HMS9xC7134 80C51 42DIP) 42SDIP) HMS97C7134 40DIP HMS91C7134) BP2325 HMS91C7134 HMS91C7134K HMS97C7134

    AD9888

    Abstract: Hsync Vsync ap AD9888KS-100 AD9888KS-140 AD9888KS-170 AD9888KS-205
    Text: a FEATURES 205 MSPS Maximum Conversion Rate 500 MHz Programmable Analog Bandwidth 0.5 V to 1.0 V Analog Input Range Less than 450 ps p-p PLL Clock Jitter @ 205 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for “Hot Plugging” 2:1 Analog Input Mux


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    PDF AD9888 C02442 AD9888 Hsync Vsync ap AD9888KS-100 AD9888KS-140 AD9888KS-170 AD9888KS-205

    Untitled

    Abstract: No abstract text available
    Text: a FEATURES 205 MSPS Maximum Conversion Rate 500 MHz Programmable Analog Bandwidth 0.5 V to 1.0 V Analog Input Range Less than 450 ps p-p PLL Clock Jitter at 205 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for “Hot Plugging” 2:1 Analog Input Mux


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    PDF AD9888 S-128) C02442

    HSYNC, VSYNC input output

    Abstract: ad9883 layout AD9883 AD9883KST-110 HSYNC GENERATE PIXEL CLOCK SoG to hsync vsync
    Text: a FEATURES 110 MSPS Maximum Conversion Rate 300 MHz Analog Bandwidth 0.5 V to 1.0 V Analog Input Range 500 ps p-p PLL Clock Jitter at 110 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for ”Hot Plugging” Midscale Clamping Power-Down Mode Low Power: 500 mW Typical


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    PDF AD9883 AD9883 C01881 80-Lead ST-80) HSYNC, VSYNC input output ad9883 layout AD9883KST-110 HSYNC GENERATE PIXEL CLOCK SoG to hsync vsync

    sync to HSYNC and VSYNC converter

    Abstract: HSYNC, VSYNC Clock generator rgb Hsync Vsync generator SCL SDA VSYNC HSYNC PXCK image HSYNC GENERATE PIXEL CLOCK HSYNC PLL Hsync Vsync VGA HSYNC, VSYNC Clock generator pin vga CRT pinout 80-Lead LQFP ST-80
    Text: a 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays AD9883A FEATURES 140 MSPS Maximum Conversion Rate 300 MHz Analog Bandwidth 0.5 V to 1.0 V Analog Input Range 500 ps p-p PLL Clock Jitter at 110 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for ”Hot Plugging”


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    PDF MSPS/140 AD9883A AD9883A C02561 80-Lead ST-80) sync to HSYNC and VSYNC converter HSYNC, VSYNC Clock generator rgb Hsync Vsync generator SCL SDA VSYNC HSYNC PXCK image HSYNC GENERATE PIXEL CLOCK HSYNC PLL Hsync Vsync VGA HSYNC, VSYNC Clock generator pin vga CRT pinout 80-Lead LQFP ST-80

    Untitled

    Abstract: No abstract text available
    Text: FEATURES 170 MSPS maximum conversion rate 500 MHz programmable analog bandwidth 0.5 V to 1.0 V analog input range Less than 450 ps p-p PLL clock jitter at 170 MSPS 3.3 V power supply Full sync processing Sync detect for hot plugging 2:1 analog input mux 4:2:2 output format mode


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    PDF MSPS/140 MSPS/170 AD9888 128-Lead S-128-1) AD9888KSZ-100 AD9888KSZ-140 AD9888KSZ-170

    ak8854

    Abstract: AK8854VQ Video cvbs 656 YPbPr RGB sog SMPTE-253M bt.656 parallel to RGB bt.656 to RGB PAL-60 Line285
    Text: [AK8854VQ] AK8854VQ Multi-Format Digital Video Decoder Overview The AK8854VQ is a single-chip digital video decoder for composite, s-video, component YPbPr and RGB video signals. In case of RGB, AK8854VQ support Sync on Green,CSYNC and H/VSYNC as sync signal. Its output data is in YCbCr format, compliant with ITU-R BT.601. Its pixel clock, with a


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    PDF AK8854VQ] AK8854VQ AK8854VQ 64-terminal MS0973-E-01 ak8854 Video cvbs 656 YPbPr RGB sog SMPTE-253M bt.656 parallel to RGB bt.656 to RGB PAL-60 Line285

    AK8854VQ

    Abstract: SMPTE-253M AK8854 bt.656 interface burst signal
    Text: [AK8854VQ] AK8854VQ Multi-Format Digital Video Decoder Overview The AK8854VQ is a single-chip digital video decoder for composite, s-video, component YPbPr and RGB video signals. In case of RGB, AK8854VQ support Sync on Green,CSYNC and H/VSYNC as sync signal. Its output data is in YCbCr format, compliant with ITU-R BT.601. Its pixel clock, with a


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    PDF AK8854VQ] AK8854VQ 64-terminal MS0973-E-03 SMPTE-253M AK8854 bt.656 interface burst signal

    HORIZONTAL DRIVER TRANSISTOR

    Abstract: TDA4810 Automatic Voltage stabilizer
    Text: Philips Semiconductors Data sheet status Prelim inary specification date of issue M a y 1991 FEATURES • Sync separator with AC-coupled and DC-coupled inputs for signals of nearly all existing sync sources e.g. T T L /v id e o • Amplitude dependent sync slicing


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    PDF TDA4810 HORIZONTAL DRIVER TRANSISTOR TDA4810 Automatic Voltage stabilizer

    Untitled

    Abstract: No abstract text available
    Text: Order this document by MC44145/D MOTOROLA MC44145 Pixel Clock Generator/ Sync Separator The MC44145, Pixel Clock Generator, is a component of the MC44000 family. The MC44145 contains a sync separator with composite sync and vertical outputs, and clock generation circuitry for the digitization of any video signal


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    PDF MC44145/D MC44145 MC44145, MC44000 SO-14 ------------------------------1PHX36140-O tO/96

    Video cvbs out

    Abstract: teletext
    Text: Philips Semiconductors Datasheet statue Preliminary specification date of Issue March 1991 FEATURES • Adaptive sync slicer with buffered composite sync output VCS • Adaptive data slicer • Data rate clock regenerator • Field selection and line 16 decoding


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    PDF SAA4700 Video cvbs out teletext

    SAA4700

    Abstract: AFR18
    Text: Data sheet status Preliminary specification date o f issue February 1991 SAA4700 VPS dataline processor supersedes data of Septem ber 1988 Ì l— *. HÜ *- H in BUS FEATURES • Adaptive sync slicer with buffered composite sync output VCS • Adaptive data slicer


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    PDF SAA4700 SAA4700 AFR18

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Data sheet status P re lim in a ry s p e c ific a tio n date of Issue M a rc h 1991 SAA4700T VPS dataline processor PUS FEATURES • Adaptive sync slicer with buffered composite sync output VCS • Adaptive data slicer • Data rate clock regenerator


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    PDF SAA4700T

    mc44000

    Abstract: adaptive slicer amp pcb adaptive slicer video separator C44250 vco sync separator
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Sync Separator/ Pixel Clock Generator SYNC SEPARATOR/ PIXEL CLOCK GENERATOR SILICON MONOLITHIC INTEGRATED CIRCUIT The M C44145 Pixel Clock G enerator is a com ponent of the MC44000 family, and a spin-off of the PLL2 function of the M C44011, Digital M ultistandard Video


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    PDF MC44145 MC44000 C44011, C44145 MC44145, MC44011 C44250) C44145 adaptive slicer amp pcb adaptive slicer video separator C44250 vco sync separator

    10HEADER

    Abstract: HEX23
    Text: S IE M E N S 2 System Description 2.1 Functions SDA 5650/X Referring to the functional block diagram of the PD C / V P S decoder, the composite video signal with negative going sync pulses is coupled to the pin C V B S through a capacitor which is used for clamping the bottom of the sync pulses to an internally fixed level. The


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    PDF 5650/X 10HEADER HEX23