sparc v7
Abstract: No abstract text available
Text: TSC695E Rad-Hard Rad-Hard 32-bit SPARC SPARC 32-bit Embedded Processor Processor Embedded Data Sheet Rev.003 - January 2000 1 Preliminary TSC695E Data Sheet Information Foreword TEMIC Semiconductors reserves the right to make changes in the products or specifications contained in this
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TSC695E
32-bit
sparc v7
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Untitled
Abstract: No abstract text available
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4204Câ
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Untitled
Abstract: No abstract text available
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4118Jâ
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ERC32
Abstract: TSC695F TSC695FL embedded instruction set 5962R0054001VXC
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4118J
ERC32
TSC695F
TSC695FL
embedded instruction set
5962R0054001VXC
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Untitled
Abstract: No abstract text available
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4204Câ
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7 bit hamming code
Abstract: TSC695FL ERC32 TSC695 TSC695FL PINS d2590
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4204C
7 bit hamming code
TSC695FL
ERC32
TSC695
TSC695FL PINS
d2590
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WE 251
Abstract: erc32 trap TSC695 ERC32 TSC695F TSC695FL d2786 7 bit hamming code embedded instruction set d2491
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4118H
WE 251
erc32 trap
TSC695
ERC32
TSC695F
TSC695FL
d2786
7 bit hamming code
embedded instruction set
d2491
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PDF
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Untitled
Abstract: No abstract text available
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4118Iâ
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WE 251
Abstract: SPARC T4-2 d2786 ERC32 TSC695F d2687 fdn 156 d2491 TTA0 4118F
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals: • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface:
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32/64-bit
40-bit
4118F
WE 251
SPARC T4-2
d2786
ERC32
TSC695F
d2687
fdn 156
d2491
TTA0
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ERC32
Abstract: erc32 trap TSC695 TSC695FL T2815 WE 251
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4204C
ERC32
erc32 trap
TSC695
TSC695FL
T2815
WE 251
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7 bit hamming code
Abstract: SPARC T4-2 TSC695FL-15MA TSC695FL-15MA-E FDN 305
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
4204B
7 bit hamming code
SPARC T4-2
TSC695FL-15MA
TSC695FL-15MA-E
FDN 305
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ERC32
Abstract: TSC695 TSC695FL erc32 trap WE 251 d1899
Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface
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32/64-bit
40-bit
ERC32
TSC695
TSC695FL
erc32 trap
WE 251
d1899
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4-bit even parity checker circuit diagram
Abstract: circuit diagram of wireless door lock system ERC32 T10 206 00 TSC695F
Text: TSC695F Rad-Hard Rad-Hard 32-bit SPARC SPARC 32-bit Embedded Processor Processor Embedded Data Sheet Rev.E - 22 March, 2001 1 TSC695F Data Sheet Information Foreword Atmel Nantes S.A. reserves the right to make changes in the products or specifications contained in this document
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TSC695F
32-bit
4-bit even parity checker circuit diagram
circuit diagram of wireless door lock system
ERC32
T10 206 00
TSC695F
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TSC695E
Abstract: No abstract text available
Text: TSC695E Rad-Hard Rad-Hard 32-bit SPARC SPARC 32-bit Embedded Processor Processor Embedded Data Sheet Rev.D - August 2000 1 TSC695E Data Sheet Information Foreword Atmel Nantes S.A. reserves the right to make changes in the products or specifications contained in this document
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TSC695E
32-bit
TSC695E
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AHA4524A-031
Abstract: aha4524 AHA4524A-031PTC ANTPC03 LCA-16 PB4540 Quadrature Decoder Interface ICs PS4501 PS4524 Demodulator 256 QAM
Text: comtech aha corporation Product Specification AHA4524 Astro LE 4K Block Turbo Product Code Encoder/Decoder This product is covered under multiple patents held or licensed by Comtech AHA Corporation. This product is covered by a Turbo Code Patent License from France Telecom - TDF - Groupe des ecoles des telecommunications.
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AHA4524
PS4524
100nF)
100nF
AHA4524A-031
aha4524
AHA4524A-031PTC
ANTPC03
LCA-16
PB4540
Quadrature Decoder Interface ICs
PS4501
Demodulator 256 QAM
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LCA-16
Abstract: AHA4522a Quadrature Decoder Interface ICs 24 pin outputs decoder ic aha4524 block diagram of 2 to 4 decoder Decoder 5 to 32 single ic hamming encoder/decoder 1 bit error correction PB4540 pin diagram of 2 to 4 decoder
Text: comtech aha corporation Product Specification AHA4522 Astro LE 2K Block Turbo Product Code Encoder/Decoder This product is covered under multiple patents held or licensed by Comtech AHA Corporation. This product is covered by a Turbo Code Patent License from France Telecom - TDF - Groupe des ecoles des telecommunications.
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AHA4522
PS4522
100nF)
100nF
LCA-16
AHA4522a
Quadrature Decoder Interface ICs
24 pin outputs decoder ic
aha4524
block diagram of 2 to 4 decoder
Decoder 5 to 32 single ic
hamming encoder/decoder 1 bit error correction
PB4540
pin diagram of 2 to 4 decoder
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IC 4033 pin configuration
Abstract: 5 to 32 decoder Decoder 5 to 32 single ic AHA4524A-031 32 line to 5 encoder IC 5 to 32 decoder circuit AHA4524A-031PTI Decoder 5 to 32 AHA4524 PS-4524
Text: comtech aha corporation Product Specification AHA4524 4 Kbit Block Turbo Product Code Encoder/Decoder This product is covered under multiple patents held or licensed by Comtech AHA Corporation. This product is covered by a Turbo Code Patent License from France Telecom - TDF - Groupe des ecoles des telecommunications.
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AHA4524
PS4524
100nF)
100nF
IC 4033 pin configuration
5 to 32 decoder
Decoder 5 to 32 single ic
AHA4524A-031
32 line to 5 encoder IC
5 to 32 decoder circuit
AHA4524A-031PTI
Decoder 5 to 32
AHA4524
PS-4524
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mec oscillator
Abstract: erc32 trap ERC32 2M x 16 DPRAM TSC691E TSC692E TSC693E
Text: TSC693E TSC693E Memory Controller User's Manual For Embedded Real time 32-bit Computer ERC32 for SPACE Applications MATRA MHS Rev. D (10 Apr. 97) 1 TSC693E TABLE OF CONTENTS Page 1. 1.1. 1.2. 1.2.1. 1.2.2. 1.3. 1.4. 1.4.1. 1.4.2. 1.4.3. INTRODUCTION . 4
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TSC693E
32-bit
ERC32)
mec oscillator
erc32 trap
ERC32
2M x 16 DPRAM
TSC691E
TSC692E
TSC693E
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TSB12LV23
Abstract: No abstract text available
Text: TSB41AB1 IEEE 1394aĆ2000 ONEĆPORT CABLE TRANSCEIVER/ARBITER SLLS423I − JUNE 2000 − REVISED MARCH 2005 D Fully Supports Provisions of IEEE D D D D D D D D D Failsafe Circuitry Senses Sudden Loss of 1394-1995 Standard for High Performance Serial Bus† and IEEE 1394a-2000
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TSB41AB1
1394a2000
SLLS423I
1394a-2000
TSB12LV23
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TSB12LV21
Abstract: TSB12LV22 TSB12LV23 TSB12LV26 TSB12LV31 TSB12LV41 TSB12LV42 TSB41AB1 TSB41LV01
Text: TSB41AB1 IEEE 1394aĆ2000 ONEĆPORT CABLE TRANSCEIVER/ARBITER SLLS423D – JUNE 2000 – REVISED SEPTEMBER 2002 D Fully Supports Provisions of IEEE D D D D D D D D 1394-1995 Standard for High Performance Serial Bus† and IEEE 1394a-2000 Fully Interoperable With FireWire and
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TSB41AB1
1394a2000
SLLS423D
1394a-2000
1394a-2000
TSB12LV21
TSB12LV22
TSB12LV23
TSB12LV26
TSB12LV31
TSB12LV41
TSB12LV42
TSB41AB1
TSB41LV01
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TSB12LV23
Abstract: No abstract text available
Text: TSB41AB1 IEEE 1394a-2000 ONE-PORT CABLE TRANSCEIVER/ARBITER SLLS423A – JUNE 2000 – REVISED NOVEMBER 2000 D Fully Supports Provisions of IEEE D D D D D D D D 1394-1995 Standard for High Performance Serial Bus† and IEEE 1394a-2000 Fully Interoperable With FireWire and
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TSB41AB1
1394a-2000
SLLS423A
1394a-200h
TSB12LV23
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85C471 sis
Abstract: 85c407 85C471 SIS85C471 85C407 sis SIS 85C471 80486 ADDRESSING MODES cyrix 486 INTEL P24T Cyrix 486 dx2
Text: 85C471 Green PC ISA-YES A Single Chip 1. 85C471 OVERVIEW 1,1 Introduction The SiS85C471 single chip controller supports Intel's 80486DX2/DX/SX/SL Enhanced, P24D/P24T/P24C CPU, Cyrix's Cx486S2 M6/M7 CPU and AMD's Am486DXL/DXL2 CPU The SiS85C471 is a high performance, 100% PC/AT compatible single chip controller,
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85C471
SiS85C471
80486DX2/DX/SX/SL
P24D/P24T/P24C
Cx486S2
Am486DXL/DXL2
P24D/P24T/P24C,
85C471 sis
85c407
85C407 sis
SIS 85C471
80486 ADDRESSING MODES
cyrix 486
INTEL P24T
Cyrix 486 dx2
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en1 3009
Abstract: 56KQ MQFP-F256 EM 222 raft pd TSC695F uart example used in k60 l17h 2360D
Text: INTEGRATED CIRCUITS, SILICON MONOLITHIC, 32-BIT SPARC EMBEDDED PROCESSOR, BASED ON TYPE TSC695F ESCC Detail Specification No. 9512/003 ISSUE 1 February 2004 esa = 11 ss = -i- 1 1 1 iis = a ii: a Document Custodian: European Space Agency - see https://escies.org
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32-BIT
TSC695F
en1 3009
56KQ
MQFP-F256
EM 222
raft pd
TSC695F
uart example used in k60
l17h
2360D
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Untitled
Abstract: No abstract text available
Text: SONY C X D 1 913 A Q Digital Video Encoder Description The CXD1913AQ is a digital video encoder designed for video CD, car navigation system and other digital video applications. The device accepts ITU-R601 compatible Y, Cb, Cr data and also accepts ITUR656-format Y, Cb, Cr data, and the data are
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CXD1913AQ
ITU-R601
ITUR656-format
27MHz
CXD1913AQ
64PIN
QFP-64P-L01
QFP064-P-1420-A
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