Untitled
Abstract: No abstract text available
Text: PRELIMINARY |W|IC=RC3N 512K M T4C 8 512/3 L WIDE DRAM X 8 512K x 8 DRAM WIDE DRAM LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View OPTIONS 28-Pin ZIP (DB-3) 28-Pin SOJ (DC-4) MARKING • Timing 60ns access 70ns access 80ns access • MASKED WRITE
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MT4C8513
024-cycle
128ms
350mW
28-Pin
MT4C8512/3
WT4C6512/3
S1993,
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Untitled
Abstract: No abstract text available
Text: ADVANCE M T4C 10016/7 16 MEG x1 DRAM FAST PAGE MODE: MT4C10016 STATIC COLUMN: MT4C10017 FEATURES • Industry standard xl pinout, timing, functions and packages • High performance, CMOS silicon gate process • Single power supply: +5V±10% or +3.3V±10%
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MT4C10016
MT4C10017
250mW
4096-cycle
475mil)
400mil)
MT4C10016/7
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Untitled
Abstract: No abstract text available
Text: ED06DRAM TECHNOLOGY, INC. DRAM M T4C 16270 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES • Industry-standard x l6 pinouts, timing, functions and packages • High-performance CMOS silicon-gate process
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ED06DRAM
512-cycle
40-Pin
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Untitled
Abstract: No abstract text available
Text: ADVANCE M T4C 1672 64K x 16 DRAM DRAM FAST PAGE MODE, DUAL CAS FEATURES • Industry standard xl6 pinouts, timing, functions and packages • High performance, CMOS silicon gate process • Single +5V±10% power supply • Low power, 3mW standby; 350mW active, typical
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350mW
256-cycle
100ns
400mil)
475mil)
40-Pin
DQ9-DQ16)
MT4C1672
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Untitled
Abstract: No abstract text available
Text: ADVANCE CZR M T4C 10016/7 16 MEG X 1 DRAM FAST PAGE MODE: MT4C10016 STATIC COLUMN: MT4C10017 FEATURES • Industry standard xl pinout, timing, functions and packages • High performance, CMOS silicon gate process • Single power supply: +5V±10% or +3.3V±10%
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MT4C10016
MT4C10017
250mW
4096-cycle
475mil)
400mil)
A0-A10/A11)
32ms/64ms,
MT4C10016/7
2048-cycle
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Untitled
Abstract: No abstract text available
Text: • h ÉidMiuiilBHááttaSflÉ BflE D MICRON TECHNOLOGY INC b llIS H T G G O E Tll =i ■ MRN ADVANCE ÉtaB*6â*ù^ÂeeÂfcâi - uMMüff T4C-2Z-/< 16K X 16 SRAM SYNCHRONOUS SRAM W ITH CLOCKED, REGISTERED INPUTS FEATURES • • • • OPTIONS MARKING « Timing
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DQ12C
DQ13C
DQ14C
52-pin
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dram zip
Abstract: No abstract text available
Text: PRELIMINARY U | | C n D N 256K X M T4C 16260/1 16 W ID E DRAM 256K X 16 DRAM WIDE DRAM ASYMMETRICAL, FAST-PAGE-MODE FEATURES • Industry-standard x l6 pinouts, timing, functions and packages • Address entry: ten row-addresses, eight columnaddresses • High-performance CMOS silicon-gate process
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500mW
024-cycle
MT4C16261
40-Pin
MT4C16260/1
dram zip
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4C8512
Abstract: No abstract text available
Text: ADVANCE 512K M T4C 8 512/3 S W IDE DRAM X 8 512K x 8 DRAM WIDE DRAM EXTENDED REFRESH SELF REFRESH FEATURES PIN ASSIGNMENT Top View • Industry-standard x8 pinouts, tim ing, functions and packages • A ddress entry: ten row -addresses, nine colum naddresses
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MT4C8513
024-cycle
128ms
350mW
28-Pin
MT4C8512/3
4C8512
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Untitled
Abstract: No abstract text available
Text: OBSOLETE 4 MEG x 1 FPM DRAM MICRON I TECHNOLOGY, INC. M T4C 1004J FEATURES • 1,024-cycle refresh distributed across 16ms MT4C1004J or 128m s (M T4C1004J L only) • Industry-standard pinout, tim ing, functions and packages • H igh-perform ance CM OS silicon-gate process
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1004J
024-cycle
MT4C1004J)
T4C1004J
20/26-Pin
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EDO DRAM
Abstract: MT4C4007JDJ-6L MT4C4007JDJ-6
Text: 1 MEG x 4 EDO DRAM V IIC Z R C H V S DRAM M T4C 4007J FEATURES PIN ASSIGNMENT (Top View Single+5V ±10% power supply JEDEC-standard pinout and packages High-performance CMOS silicon-gate process All inputs, outputs and clocks are TTL-compatible Refresh modes: RAS#-ONLY, CAS#-BEFORE- RAS#
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4007J
024-cycle
128ms
20/26-Pin
128ms
EDO DRAM
MT4C4007JDJ-6L
MT4C4007JDJ-6
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LM 8512
Abstract: T4C marking marking t4c
Text: ADVANCE M T4C 8512/3 S 512K x 8 W IDE DRAM M IC R O N WIDE DRAM 512K x 8 DRAM FEATURES PIN ASSIGNMENT Top View • Industry-standard x8 pinouts, timing, functions and packages • Address entry: ten row-addresses, nine columnaddresses • High-perform ance CM O S silicon-gate process
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MT4C8513
024-cycle
128ms
350mW
28-Pin
MT4C8512/3S
MT4C8512/3
LM 8512
T4C marking
marking t4c
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Untitled
Abstract: No abstract text available
Text: M ’ I C R O N 1 MEG X 1 FPM D R A M DRAM M T4C 1004J FEATURES • 1,024-cycle refresh distributed across 16ms M T4C1004J or 128ms (M T4C1004J L only) • Industry-standard pinout, tim ing, functions and packages • High-perform ance CM OS silicon-gate process
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024-cycle
T4C1004J)
128ms
T4C1004J
1004J
20/26-Pin
A10CL
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T4C16257DJ
Abstract: t4c16257 T4C16257DJ-7
Text: l^ lld R O N 256K DRAM M T4C 16257 X 16 DRAM 256K x 16 DRAM 5V, FAST PAGE MODE • Industry-standard x l6 pinouts, timing, functions and packages • High-perform ance CM OS silicon-gate process • Single +5V ±10% power supply* • Low power, 3m W standby; 375m W active, typical
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512-cycle
40-Pin
40/44-Pin
MT4C16257
T4C16257DJ
t4c16257
T4C16257DJ-7
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Untitled
Abstract: No abstract text available
Text: MICRON S E M I C O N D U C T O R INC b3E D • blllSHT MICRON I DDDfih22 T45 M M R N M T4C 8512/3 L m O K vX R8 WIDE \A/inP DRAM nOAM 512K S ili ICONOUCTOR MC WIDE DRAM 512K X 8 DRAM LOW POWER, EXTENDED REFRESH FEATURES • Industry-standard x8 pinouts, timing, functions and
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DDDfih22
MT4G8513
024-cyde
MT4C6512/3
C1993.
DGDflb37
MT4C8512/3L
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Untitled
Abstract: No abstract text available
Text: 1 M E G x 16 EDO DRAM V IIC Z R O N n P A V n * M M T4C 1M 16E 5 \ m M T4L C 1M 16E 5 FEATURES • JEDEC- and industry-standard x l6 tim ing, functions, pinouts and packages • High-perform ance CM OS silicon-gate process • Single pow er supply (+3.3V +0.3V or 5V ±10%
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024-cycle
44/50-Pin
42-Pin
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ite 8512
Abstract: LA 8512
Text: ADVANCE M T4C 8 512/3 512K X 8 DR AM M IC R O N DRAM 512K x 8 DRAM FAST PAGE MODE • • • • • • • • OPTIONS Vcc [ 1 DQ1 [ 2 • M asked W rite N o t available A v ailab le P ack ages P lastic SO J 400 m il P lastic T SO P (400 m il) P lastic Z IP (375 m il)
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024-cy
MT4C8512/3
MT4CB512/3
ite 8512
LA 8512
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T4C4001
Abstract: No abstract text available
Text: M T4C 4001J 1 MEG X 4 DRAM [MICRON 1 MEG x 4 DRAM FAST PAGE MODE FEATURES PIN ASSIGNMENT Top View • Ind u stry stan d ard x4 p in o u t, tim in g , fu n ctio n s and p ackages • H ig h -p erfo rm an ce, C M O S silico n -g a te p ro cess • Sin g le + 5 V ± 1 0 % p o w er sup p ly
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4001J
024-cy
20-Pin
MT4C4001J
T4C4001
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Untitled
Abstract: No abstract text available
Text: ADVANCE WIDE DRAM 512K x 8 DRAM EXTENDED REFRESH SELF REFRESH FEATURES • Industry-standard x8 pinouts, timing, functions and packages • Address entry: ten row-addresses, nine columnaddresses • High-performance CMOS silicon-gate process • Single +5V ±10% power supply
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MT4C8513
024-cycle
128ms
350mW
28-Pin
CYCLE24
MT4C851Z/3S
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mt4c256
Abstract: RCD 2226
Text: ADVANCE 256K X M T 4C 16270/1 16 W IDE DRAM 256K X 16 DRAM WIDE DRAM FAST-PAGE-MODE WITH EXTENDED DATA-OUT FEATURES PIN ASSIGNMENT Top View • Industry-standard xl6 pinouts, tim ing, functions and packages • H igh-perform ance CMOS silicon-gate process
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500mW
512-cycle
MT4C16271
40-Pin
mt4c256
RCD 2226
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RCD 2226
Abstract: No abstract text available
Text: ADVANCE M T 4 C 16256/7/8/9 256K X 16 DRAM p ilC Z R O IM DRAM 256K x 16 DRAM FAST PAGE MODE PIN ASSIGNMENT Top View • Industry standard x l6 pinouts, timing, functions and packages • High-performance, CM OS silicon-gate process • Single +5V ±10% power supply
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500mW
40-Pin
3C16256
T4C16257
RCD 2226
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MT4C16270DJ-7
Abstract: No abstract text available
Text: MICPON SFM JCONDUCTOR INC L.1E D • b 11 IS 4 e} DDDTìSB 2ST MflRN M IC R O N I MT4C16270 256K X 16 DRAM SEUiCOhOkJCTOH, INC. DRAM 256K x 16 DRAM EDO PAGE MODE FEATURES • Industry-standard x l6 pinouts, timing, functions and packages • High-performance CMOS silicon-gate process
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MT4C16270
512-cycle
MT4C16270DJ-7
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Untitled
Abstract: No abstract text available
Text: MICRON B M T4C16256/7/8/9 L 256K X 16 WIDE DRAM BCMICDNDUCTaH. WC WIDE DRAM 256K x 16 DRAM LOW POWÉR, EXTENDED REFRESH FEATURES MARKING • T im ing 60ns access 70ns access 80ns access • W rite Cycle Access BYTE o r W ORD via WE nonm askable BYTE or W ORD via CAS
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T4C16256/7/8/9
T4C16257/9
T4C16258/9
512-cycle
500mW
40-Pin
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C5190
Abstract: No abstract text available
Text: M i r a r i M I . V J L Z m t 4 c i m i 6E5 S 1 MEG X 16 DRAM DRAM 1 MEG x 16 DRAM 5.0V, EDO PAGE MODE, OPTIONAL SELF REFRESH FEATURES * * * * * * * * * JEDEC- and industry-standard x l6 timing, functions, pinouts and packages H igh-perform ance CM OS silicon-gate process
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024-cycle
44/50-Pin
C5190
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Untitled
Abstract: No abstract text available
Text: I^ IC R Q N 1 MEG DRAM 1 MEG X MT4C1026 X 1 DRAM 1 DRAM STATIC COLUMN FEATURES • Industry standard x l pinout, timing, functions and packages • High-performance, CM OS silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 175mW active, typical
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MT4C1026
175mW
512-cycle
18-Pin
20-Pin
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