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    TMS 3534 Search Results

    TMS 3534 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    50013-5348ALF Amphenol Communications Solutions High Pin Count, Backplane Connectors, Header, Vertical, Through Hole, 3 Row, 1 Guide Pin, 348 Positions, 2.54mm (0.100in) Pitch Visit Amphenol Communications Solutions
    88873-534LF Amphenol Communications Solutions Quickie® IDC Cable-to-Board Connector System, Shrouded Slim Line Header, Vertical, Through Hole, Double Row, 34 Positions, 2.54mm (0.100in) Pitch. Visit Amphenol Communications Solutions
    TPS73534DRBT Texas Instruments 500mA, Adjustable, Low Quiescent Current, Low-Noise, High-PSRR, Single-Output LDO Regulator 8-SON -40 to 125 Visit Texas Instruments Buy
    TPS73534DRBR Texas Instruments 500mA, Adjustable, Low Quiescent Current, Low-Noise, High-PSRR, Single-Output LDO Regulator 8-SON -40 to 125 Visit Texas Instruments Buy

    TMS 3534 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■


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    PDF CY7C1303BV25 18-Mbit

    3M Touch Systems

    Abstract: No abstract text available
    Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■


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    PDF CY7C1303BV25 18-Mbit CY7C1303BV25 3M Touch Systems

    3M Touch Systems

    Abstract: No abstract text available
    Text: CY7C1303BV25 18-Mbit Burst of Two-Pipelined SRAM with QDR Architecture 18-Mbit Burst of Two-Pipelined SRAM with QDR® Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■


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    PDF CY7C1303BV25 18-Mbit CY7C1303BV25 3M Touch Systems

    CY7C1371DV33

    Abstract: No abstract text available
    Text: CY7C1371DV33 18-Mbit 512 K x 36 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36) Flow-Through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles


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    PDF CY7C1371DV33 18-Mbit CY7C1371DV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1371DV33 18-Mbit 512 K x 36 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36) Flow-Through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles


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    PDF CY7C1371DV33 18-Mbit CY7C1371DV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1447AV25 36-Mbit 512 K x 72 Flow-Through SRAM 36-Mbit (512 K × 72) Flow-Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 512 K × 72 common I/O ■ 2.5 V core power supply ■ 2.5 V and 1.8 V I/O power supply ■


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    PDF CY7C1447AV25 36-Mbit CY7C1447AV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV25 CY7C1447AV25 36-Mbit 1 M x 36/512 K × 72 Flow-Through SRAM 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 1 M × 36/512 K × 72 common I/O ■ 2.5 V core power supply


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    PDF CY7C1441AV25 CY7C1447AV25 36-Mbit CY7C1441AV25/CY7C1447AV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV25 CY7C1447AV25 36-Mbit 1 M x 36/512 K × 72 Flow-Through SRAM 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM Functional Description Features • Supports 133 MHz bus operations ■ 1 M × 36/512 K × 72 common I/O ■ 2.5 V core power supply


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    PDF CY7C1441AV25 CY7C1447AV25 36-Mbit CY7C1441AV25 165-ball CY7C144al

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV25 CY7C1447AV25 36-Mbit 1 M x 36/512 K × 72 Flow-Through SRAM 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 1 M × 36/512 K × 72 common I/O ■ 2.5 V core power supply


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    PDF CY7C1441AV25 CY7C1447AV25 36-Mbit CY7C1441AV25/CY7C1447AV25

    fx3 pin map

    Abstract: CYUSB301X
    Text: CYUSB301X, CYUSB201X EZ-USB FX3: SuperSpeed USB Controller Features • ■ ■ ■ ■ Universal serial bus USB integration ❐ USB 3.0 and USB 2.0 peripherals compliant with USB 3.0 specification 1.0 ❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0 ❐ High-speed On-The-Go (HS-OTG) host and peripheral


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    PDF CYUSB301X, CYUSB201X 100-MHz 32-bit ARM926s fx3 pin map CYUSB301X

    BGA FX3_121

    Abstract: CYUSB301X CLKIN32 CYUSB3014-FBXIT WLCSP chip attach 131-BA gpio to i2C CYUSB3011 CYUSB3014-BZXC FX3_121
    Text: CYUSB301X EZ-USB FX3: SuperSpeed USB Controller Features • ■ ■ ■ ■ Universal serial bus USB integration ❐ USB 3.0 and USB 2.0 peripherals compliant with USB 3.0 specification 1.0 ❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0 ❐ High-speed On-The-Go (HS-OTG) host and peripheral


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    PDF CYUSB301X 100-MHz 32-bit ARM926EJ 200-MHz 512-KB 256-KB BGA FX3_121 CYUSB301X CLKIN32 CYUSB3014-FBXIT WLCSP chip attach 131-BA gpio to i2C CYUSB3011 CYUSB3014-BZXC FX3_121

    CYUSB301X

    Abstract: No abstract text available
    Text: CYUSB301X EZ-USB FX3: SuperSpeed USB Controller Features • ■ ■ ■ ■ Universal serial bus USB integration ❐ USB 3.0 and USB 2.0 peripherals compliant with USB 3.0 specification 1.0 ❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0 ❐ High-speed On-The-Go (HS-OTG) host and peripheral


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    PDF CYUSB301X 100-MHz 32-bit ARM926EJ CYUSB301X

    cyusb3014

    Abstract: CYUSB301X SuperSpeed USB 3.0 to Serial ATA Bridge usb uvc controller ic ARM926EJ-S electrical M25P* Silicon Solution cypress fx3 TO-39, UVC CYUSB3011 20-DQ21
    Text: CYUSB301X EZ-USB FX3 SuperSpeed USB Controller Features • Fully accessible 32-bit CPU ❐ ARM926EJ core with 200-MHz operation ❐ 512-KB or 256-KB embedded SRAM Additional connectivity to the following peripherals 2 ❐ I C master controller at 1 MHz


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    PDF CYUSB301X 100-MHz 32-bit ARM926EJ 200-MHz 512-KB 256-KB cyusb3014 CYUSB301X SuperSpeed USB 3.0 to Serial ATA Bridge usb uvc controller ic ARM926EJ-S electrical M25P* Silicon Solution cypress fx3 TO-39, UVC CYUSB3011 20-DQ21

    CYUSB301X

    Abstract: No abstract text available
    Text: CYUSB301X EZ-USB FX3 SuperSpeed USB Controller Features • Independent power domains for core and I/O ❐ Core operation at 1.2 V 2 ❐ I S, UART, and SPI operation at 1.8 to 3.3 V 2 ❐ I C operation at 1.2 V ■ 10- x 10-mm, 0.8-mm pitch Pb-free ball grid array BGA


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    PDF CYUSB301X 10-mm CYUSB301X

    Untitled

    Abstract: No abstract text available
    Text: CS5376A Low-power, Multi-channel Decimation Filter Features Description 1- to 4-channel Digital Decimation Filter The CS5376A is a multi-function digital filter utilizing a low-power signal processing architecture to achieve efficient filtering for up to four ∆Σ modulators. By


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    PDF CS5376A CS5376A CS3301A/02A CS5371A/72A CS4373A DS612F4

    TMS 3834

    Abstract: geophone detector Atmel H122 sps H113 931 h68 sps 1951 atmel h118 atmel H116
    Text: CS5376A Low Power Multi-Channel Decimation Filter Features Description 1 to 4 Channel Digital Decimation Filter The CS5376A is a multi-function digital filter utilizing a low-power signal processing architecture to achieve efficient filtering for up to four ∆Σ modulators. By combining


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    PDF CS5376A CS3301/02 CS5371/72 CS4373 CS5376A MS026 TMS 3834 geophone detector Atmel H122 sps H113 931 h68 sps 1951 atmel h118 atmel H116

    TMS 3834

    Abstract: BRC 1310 SCR FIR 3 D DS6-12F 02 01 96 1101 40298 atmel 718 h107 d1 SCR ty 8016 CS4373A
    Text: CS5376A Low-power, Multi-channel Decimation Filter Features Description z 1- to 4-channel Digital Decimation Filter Œ Multiple On-chip FIR and IIR Coefficient Sets Œ Programmable Coefficients for Custom Filters Œ Synchronous Operation The CS5376A is a multi-function digital filter utilizing a


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    PDF CS5376A CS5376A CS3301A/02A CS5371A/72A CS4373A DS612F4 TMS 3834 BRC 1310 SCR FIR 3 D DS6-12F 02 01 96 1101 40298 atmel 718 h107 d1 SCR ty 8016 CS4373A

    TMS 3834

    Abstract: 40298 DS6-12F digital filter sinc filter CS4373 CS5376 CS5376A CS5376A-IQ geophone detector
    Text: CS5376A Low Power Multi-Channel Decimation Filter Features Description 1 to 4 Channel Digital Decimation Filter Multiple On-Chip FIR and IIR Coefficient Sets Programmable Coefficients for Custom Filters Synchronous Operation Selectable Output Word Rate 4000, 2000, 1000, 500, 333, 250 SPS


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    PDF CS5376A CS5376A CS3301/02 CS5371/72 CS4373 TMS 3834 40298 DS6-12F digital filter sinc filter CS4373 CS5376 CS5376A-IQ geophone detector

    atmel H116

    Abstract: TMS 3834 40298 logic H113 BRC 1310 H123 H124 CS4373A CS5376 CS5376A
    Text: CS5376A Low-power, Multi-channel Decimation Filter Features Description z 1- to 4-channel Digital Decimation Filter Œ Multiple On-chip FIR and IIR Coefficient Sets Œ Programmable Coefficients for Custom Filters Œ Synchronous Operation The CS5376A is a multi-function digital filter utilizing a


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    PDF CS5376A CS5376A CS3301/02 CS5371/72 CS4373A DS612F3 atmel H116 TMS 3834 40298 logic H113 BRC 1310 H123 H124 CS4373A CS5376

    A2F060

    Abstract: No abstract text available
    Text: Revision 10 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)


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    PDF 32-Bit A2F060

    A2F500M3

    Abstract: A2F500 A2F500 FG484 A2F200-FG484 A2F500 pin details A2F060 A2F060M A2F200M3 A2F200M3F-FG256 A2F200M3F
    Text: Revision 9 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)


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    PDF 32-Bit A2F500M3 A2F500 A2F500 FG484 A2F200-FG484 A2F500 pin details A2F060 A2F060M A2F200M3 A2F200M3F-FG256 A2F200M3F

    Pentium A80501-60

    Abstract: No abstract text available
    Text: in te i PENTIUM PROCESSOR Max. Operating Frequency 75 MHz 90 MHz 100 MHz 120 MHz 133 MHz 150 MHz 166 MHz 200 MHz 67 81 90 100 111 114 127 142 iCOMP* Index 2.0 Rating Note: Contact Intel Corporation for more information about iCOMP*lndex 2.0 ratings. Compatible with Large Software Base


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    PDF 32-Bit 64-Bit 4fi2bl75 Pentium A80501-60

    TMS5220

    Abstract: tms50c42 TMS50C20 SDS HB1 tms50c4 50C20 654P74 SINE VAWE crystal oscillator SPEECH CIRCUITS 654P64
    Text: TMS50C20: A CMOS SPEECH SYNTHESIZER TMS50C20: A CMOS SPEECH SYNTHESIZER ♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦♦ USER'S MANUAL ♦♦♦♦♦♦♦♦♦♦♦♦♦ SEPTEMBER 1988 ♦♦♦♦♦♦♦♦♦♦♦♦♦♦


    OCR Scan
    PDF TMS50C2 TMS50C20: TMS50C20 90000F BA54EBCA8DBECFOB847ABAFC5B3ADEB1BE5BBAD3F B4289BAC54BCA96B4Ã BADC6BB002BA8B4BC502B3057B170BBC0D2B5626F B177BB2072B1E2EB4B4BBD0D4B8B21BD425B2520F TMS5220 tms50c42 SDS HB1 tms50c4 50C20 654P74 SINE VAWE crystal oscillator SPEECH CIRCUITS 654P64

    Untitled

    Abstract: No abstract text available
    Text: pMC-Sierra, Inc. PM7323 RCMP-200 P r e l im in a r y I n f o r m a t io n is su e 1 ROUTING CONTROL, MONITORING AND POUCING 200 Mbps FEA TU R ES • Monolithic single chip device which handles ATM switch Ingress VPI/VCI address translation, cell appending, cell rate policing, counting, and OAM requirements


    OCR Scan
    PDF PM7323 RCMP-200 355x106 300mV 00G3bfll PM7322 RCMP-800.