Untitled
Abstract: No abstract text available
Text: 100 Base-TX & TP-PMD SMD Transformer & Choke 000-6120-37R LANDatacom Features RCV 16 9 15 10 1CT:1CT 11 14 3 XMIT 7 2 • Meets IEEE 802.3 standard • Supports National Semiconductor, Intel, Level One, ICS, TDK, SEEQ, and Lucent transceivers • Unique lead design improves solder
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000-6120-37R
155Mbps
100Base-TX
375/reel
100KHz
100MHz
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Untitled
Abstract: No abstract text available
Text: 10/100Mbps SMD Xfmr & Choke 000-6241-37R LANDatacom Features XMIT 16 10 14 12 15 11 1CT:1 3 RCV 1 7 5 • Designed for 155 Mbps ATM, 10/100 Base-TX & TP-PMD networks • Meets IEEE 802.3 standard • Supports National Semiconductor, Intel, Level One, ICS, TDK, SEEQ,
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10/100Mbps
000-6241-37R
155Mbps
100Base-TX
Ta-16
100KHz
100MHz
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Untitled
Abstract: No abstract text available
Text: IDM29902 National Semiconductor IDM29902 Priority Encoder General Description Features and Benefits The ID M 29902 p rio rity encoder encodes eight data lines to three-line 4-2-1 binary (octal). The im p lie d decimal zero co n d itio n requires no in p u t c o n d itio n , as zero is
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IDM29902
IDM29902
Series-54/74
29902N
29902JC
29902JM
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SAFETY AWT 1 11
Abstract: R6265-2 54ALS162 ALS621
Text: DM54ALS16211DM74ALS1621, DM54ALS1622/DM74ALS1622 PRELIMINARY National Semiconductor DM54ALS16211DM74ALS1621, DM54ALS16221DM74ALS1622 Octal Open Collector Output Bus Transceivers General Description Features Th e se a dvanced low p o w e r S c h o ttk y d evice s c o n ta in 8
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DM54ALS16211DM74ALS1621,
DM54ALS16221DM74ALS1622
ALS1621
ALS1622
ALS1622
ALS1621
SAFETY AWT 1 11
R6265-2
54ALS162
ALS621
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circuit diagram for cd 6283
Abstract: CI 74196 DM74196 cd 6282 cd DM54 DM74 DM74197 Ci 6287
Text: DM54196/DM74196, DM54197/DM74197 National mm Semiconductor DM54196/DM74196, DM54197/DM74197 Presettable Decade and Binary Counters General Description Features These hig h -sp ee d c o u n te rs c o n s is t o f fo u r d-c co up le d, m a ste r-sla ve flip -flo p s w h ic h are in te rn a lly in te rc o n
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DIVI54196/DM74196,
DM54197/DM74197
TL/f/6565-2
circuit diagram for cd 6283
CI 74196
DM74196
cd 6282 cd
DM54
DM74
DM74197
Ci 6287
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7493AN
Abstract: 7493a binary counter 7490A DM54 DM5490A DM74 DM7490A 7493a counter 7493A count 7493a
Text: DM5490A/DM7490A, DM5492A/DM7492A, DM5493A/DM7493A National Semiconductor DM5490A/DM7490A, DM5492A/DM7492A, DM5493A/DM7493A Decade, Divide by 12, and Binary Counters General Description Features Each o f th e s e m o n o lith ic c o u n te rs c o n ta in s fo u r m a s te r
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DM5490A/DM7490A,
DM5492A/DM7492A,
DM5493A/DM7493A
7493AN
7493a binary counter
7490A
DM54
DM5490A
DM74
DM7490A
7493a counter
7493A count
7493a
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7493a binary counter
Abstract: 7493AN 7490A 7493A DM54 DM5490A DM74 DM7490A
Text: DM5490A/DM7490A, DM5492A/DM7492A, DM5493A/DM7493A National Semiconductor DM5490A/DM7490A, DM5492A/DM7492A, DM5493A/DM7493A Decade, Divide by 12, and Binary Counters General Description Features Each o f th e s e m o n o lith ic c o u n te rs c o n ta in s fo u r m a s te r
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DM5490A/DM7490A,
DM5492A/DM7492A,
DM5493A/DM7493A
7493a binary counter
7493AN
7490A
7493A
DM54
DM5490A
DM74
DM7490A
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DM7580
Abstract: DM8546 DM7546 7546j
Text: DM7546/DM8546 ç j l National ÆjA Semiconductor DM7546/DM8546 TRI-STATE 8-Bit Universal I/O Shift Registers General Description Absolute Maximum Ratings Note d These c irc u its are TRI-STATE, 8 -b it, e dg e -trig ge re d , univer sal sh ift re g iste rs w hich are ca p a b le of opera tin g in any o f
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DM7546/DM8546
TL/F16587-3
TUF/6507-5
DM7580
DM8546
DM7546
7546j
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DM54
Abstract: DM74
Text: DM54S135/ DM74S135 National Semiconductor DM54S135/DM74S135 Quad Exclusive-OR/NOR Gates General Description Absolute Maximum Ratings Note d T h is d e vice c o n ta in s tw o c o m b in a tio n s o f g ate s w h ich p e rfo rm s th e lo g ic E xclusive-O R /N O R fu n c tio n .
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DM54S135/DM74S135
DM54
DM74
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j 5804
Abstract: "IEEE-488 GPIB" 5804 DS75160A DS75160AN DS75161A DS75162A DS75162AN DS75162AWM M24B
Text: DS75160A/DS75161A/DS75162A S3 National m M Semiconductor DS75160A /D S75161A /D S75162A IEEE-488 GPIB Transceivers Features General Description This family of high-speed-Schottky 8-channel bi-directional transceivers is designed to interface TTL/MOS logic to the
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DS75160A/DS75161A/DS75162A
IEEE-488
DS75162A
b50112t.
j 5804
"IEEE-488 GPIB"
5804
DS75160A
DS75160AN
DS75161A
DS75162A
DS75162AN
DS75162AWM
M24B
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DM54
Abstract: DM74 DM74S134
Text: DM54S134/ DM74S134 National ÆjkI Semiconductor DM54S134/DM74S134 TRI-STATE 12-Input NAND Gate General Description Absolute Maximum Ratings Note i> T h is d evice c o n ta in s a g a te w h ich p e rfo rm s th e lo g ic N A N D fu n c tio n . The o u tp u t has th e TRI-STATE fe a tu re .
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DM54S134/DM74S134
12-lnput
DM54
DM74
DM74S134
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IDM29902NC
Abstract: IDM29902JC IDM29902JM
Text: IDM29902 National Semiconductor ID M 29902 Priority Encoder General Description Features and Benefits T h e ID M 2 9 9 0 2 p r io r it y e n c o d e r enco des e ig h t data lines to th re e -lin e 4 -2 -1 b in a ry (o c ta l). T h e im p lie d d e c im a l
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IDM29902
Series-54/74
IDM29902NC
IDM29902JC
IDM29902JM
29902JM/883
IDM29902NC
IDM29902JC
IDM29902JM
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A9 SOT-23
Abstract: EIAJ SOIC 8 GTLP16612 GTLP16612MEA
Text: GTLP16612 National Semiconductor GTLP16612 CMOS 18-Bit GTLP/TTL Universal Bus Transceiver Designed with Edge Rate Control Circuit to reduce out put noise General Description The GTLP16612 is an 18-bit universal bus transceiver which provides TTL to GTLP signal level translation. The device is
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GTLP16612
18-Bit
GTLP16612
C164245
P16612
E16612
PE16612
P16616
E16616
A9 SOT-23
EIAJ SOIC 8
GTLP16612MEA
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7483APC
Abstract: TSSO-14 74LS83AP 7483a 4-bit adder 74LS83APC
Text: NATIONAL SEMICOND { L O G IC I 02E D I bSOUSE DQb37B5 2 | T'*/5'-'07 83A CO NNECTIO N DIAGRAM PINO UT A 54/7483A 54LS /74LS 83A “ I— r a 4-BIT BINARY FULL ADDER With Fast Carry Të] B3 Ts] So 14] Ci 3 [T s2 [T a2 [T b2 [T Vcc Si T5] Co 12] GND Q[ [7
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DQb37B5
54/7483A
/74LS
CLS83A)
54/74LS
D--07
7483APC
TSSO-14
74LS83AP
7483a 4-bit adder
74LS83APC
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74LS90N
Abstract: 74LS93N om504 74ls90 function 74LS93 logic symbol 54LS90 54LS92 DM54LS90 NSB50 CI 74LS90
Text: DM54LS90/DM74LS90, DM54LS92/DM74LS92, DM54LS93/DM74LS93 Jpg National Jud Semiconductor DM54LS90/DM74LS90, DM54LS92/DM74LS92, DM54LS93/DM74LS93 Decade, Divide by 12, and Binary Counters General Description Features Each o f th e s e m o n o lith ic c o u n te rs c o n ta in s fo u r m a s te r
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DM54LS90/DM74LS90,
DM54LS92/DM74LS92,
DM54LS93/DM74LS93
74LS90N
74LS93N
om504
74ls90 function
74LS93 logic symbol
54LS90
54LS92
DM54LS90
NSB50
CI 74LS90
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Untitled
Abstract: No abstract text available
Text: NATIONAL SEniCOND Î L O G I O 05E D I t.501122 D D t ^ D ! □ I T -v s -,7 180 C O N N E C T IO N D IA G R A M P IN O U T A 5 4 /7 4 1 8 0 14 ] V c c u j T 8-B IT PARITY G EN ER ATO R/CH EC KER H ]l5 17 E D E S C R I P T I O N — T he '180 is a m onolithic, 8-bit parity checker/generator
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fl--07
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tl 4226 G
Abstract: PL021
Text: National Semiconductor DM74197 Presettable Binary Counters General Description The ’ 197 ripple counter contains divide-by-two and divideby-eight sections which can be combined to form a modulo16 binary counter. State changes are initiated by the tailing
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DM74197
modulo16
TL/F/9784-2
TL/F/9784-3
tl 4226 G
PL021
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74192 internal diagram
Abstract: 74192FC 74LS192P 74LS192DC 74LS192 INTERNAL DIAGRAM 74192 counter
Text: 1 NATIONAL SEMICOND -CLOGIO DEE D | b S D U B S _ ~ T - 9 5 DDbBiei 5 | 3 -o 9 192 CO NN ECTIO N DIAGRAM PINO UT A 54/74192 54LS /74LS192 \ UP/DOWN DECADE COUNTER I P i[T 161Vcc o.QE H ] po Qo [T With Separate U p/D ow n Clocks
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/74LS192
LSD112E
54/74LS
74192 internal diagram
74192FC
74LS192P
74LS192DC
74LS192 INTERNAL DIAGRAM
74192 counter
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74LS247N
Abstract: 74ls249n IC 74LS247 74ls247 pin configuration bcd to seven segment circuit diagram 74LS247 74LS248 DM54LS47 pin diagram of 74LS247 DM74LS248
Text: National Semiconductor DM54LS247/DM74LS247, DM54LS248/DM74LS248, DM54LS249/DM74LS249 BCD-to-Seven Segment Decoders/Drivers General Description Features The D M 5 4 L S 2 4 7 /D M 7 4 L S 2 4 7 a nd D M 5 4 L S 2 4 8 / D M 74LS 248 are e le c tric a lly and fu n ctio na lly id e n tica l to
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DM54LS247/DM74LS247,
DM54LS248/DM74LS248,
DM54LS249/
DM74LS249
DM54LS247/DM74LS247
DM54LS248/
DM74LS248
DM54LS47/DM74LS47
DM54LS48/DM74LS48,
DM54LS249/DM74LS249
74LS247N
74ls249n
IC 74LS247
74ls247 pin configuration
bcd to seven segment circuit diagram
74LS247
74LS248
DM54LS47
pin diagram of 74LS247
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modulo 10 counter
Abstract: No abstract text available
Text: NATIONAL SEMICOND -CLOGIO 02E D | b S D U S E D0b4110 b | 05_ 7 - V S - 3 3 - a t CONNECTION DIAGRAM PINOUT A 9305 VARIABLE MODULUS COUNTER MS [ 7 DESCRIPTION — The ’05 is a monolithic, high speed, variable modulus counter circuit. It is a semisynchronous counter which can be programmed
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D0b4110
Modulo-16
C--08
modulo 10 counter
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DS26C31C
Abstract: ST26C31 ST26C31CF16 ST26C31CP16 ST26C31IF16 ST26C31IP16
Text: ST26C31 p Y f lU B m Quad RS-422 CMOS DÌff r©ntÌ3l LÌPIS DtïV©r .th e analog plus com pany Ju n e 1997-3 FEATURES Pin-to-Pin Compatible with National DS26C31C Low Power CMOS Design Three-State Outputs with Enable Pin Meets the El A RS-422 Requirements
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ST26C31
RS-422
DS26C31C
ST26C31
ST26C31CF16
ST26C31CP16
ST26C31IF16
ST26C31IP16
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pj 84
Abstract: AN-90 MM74C933
Text: MM54C933/MM74C933 National Semiconductor PR ELIM INARY MM54C933/MM74C933 Address Bus Comparator General Description Features The MM54C933/MM74C933 Bus C om p ara tor com pares tw o bina ry w ords o f up to 7 b its in length, and de te r m ines w hether they are equal b it to r bit . Both enable
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MM54C933/MM74C933
54C/74C
AN-90.
pj 84
AN-90
MM74C933
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74S257 national
Abstract: No abstract text available
Text: oc7 NATIONAL SEMICOND {LOGIC]- D5E D I m b S G llS S m 00^3^4 I 54S/74S257 54LS/74LS257 ’ 1 | • - C O N N E C T IO N D IA GRAM PIN O U T A T-66-21-51 s[T Vcc Q U A D 2-INPUT M U LT IPLEXER io s [ T ï| ] S Ë With 3-State Outputs lla [T Î4 ] l0 c Za [ 7
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54S/74S257
54LS/74LS257
T-66-21-51
54/74S
54/74LS
LS257)
74S257 national
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Untitled
Abstract: No abstract text available
Text: DS75160A/DS75161A/DS75162A National ß Semiconductor DS75160A/DS75161A/DS75162A IEEE-488 GPIB Transceivers General Description Features This family of high-speed-Schottky 8-channel bi-directional transceivers is designed to interface TTL/M OS logic to the
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DS75160A/DS75161A/DS75162A
DS75160A/DS75161A/DS75162A
IEEE-488
DS75162A
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