24C44
Abstract: CAT24C44 B1-1635
Text: CAT24C44 CAT24C44 256-Bit Serial Nonvolatile CMOS Static RAM FEATURES • Single 5V Supply ■ JEDEC Standard Pinouts: –8-pin DIP –8-pin SOIC 2 ■ Infinite E PROM to RAM Recall ■ CMOS and TTL Compatible I/O ■ 100,000 Program/Erase Cycles E2PROM
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CAT24C44
256-Bit
CAT24C44
300-T
24C44
B1-1635
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PDF
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CAT24C44
Abstract: 24C44 AEC-Q100 CAT24C44SI-TE13
Text: CAT24C44 256-Bit Serial Nonvolatile CMOS Static RAM FEATURES • Single 5V Supply ■ JEDEC Standard Pinouts: –8-pin DIP –8-pin SOIC ■ Infinite EEPROM to RAM Recall ■ CMOS and TTL Compatible I/O ■ 100,000 Program/Erase Cycles EEPROM ■ Low CMOS Power Consumption:
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Original
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CAT24C44
256-Bit
CAT24C44
24C44
AEC-Q100
CAT24C44SI-TE13
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PDF
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CAT24C44
Abstract: 24C44
Text: CAT24C44 256-Bit Serial Nonvolatile CMOS Static RAM FEATURES • Single 5V Supply ■ JEDEC Standard Pinouts: –8-pin DIP –8-pin SOIC ■ Infinite E2PROM to RAM Recall ■ CMOS and TTL Compatible I/O ■ 100,000 Program/Erase Cycles E2PROM ■ Low CMOS Power Consumption:
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Original
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CAT24C44
256-Bit
CAT24C44
5019-0A
24C44
-TE13
2000/Reel
24C44
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PDF
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24C44
Abstract: CAT24C44 24c44si
Text: CAT24C44 256-Bit Serial Nonvolatile CMOS Static RAM FEATURES • Single 5V Supply ■ JEDEC Standard Pinouts: –8-pin DIP –8-pin SOIC ■ Infinite E2PROM to RAM Recall ■ CMOS and TTL Compatible I/O ■ 100,000 Program/Erase Cycles E2PROM ■ Low CMOS Power Consumption:
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Original
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CAT24C44
256-Bit
CAT24C44
5019-0A
24C44
-TE13
2000/Reel
24C44
24c44si
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PDF
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CAT24C44
Abstract: No abstract text available
Text: CAT24C44 256-Bit Serial Nonvolatile CMOS Static RAM FEATURES • Single 5V Supply ■ JEDEC Standard Pinouts: –8-pin DIP –8-pin SOIC ■ Infinite EEPROM to RAM Recall ■ CMOS and TTL Compatible I/O ■ 100,000 Program/Erase Cycles EEPROM ■ Low CMOS Power Consumption:
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Original
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CAT24C44
256-Bit
CAT24C44
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PDF
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54SX72
Abstract: A54SX32APQ FBGA-484 A54SX16A THERMAL Fuse m20 tf 115 c PAR64 REQ64 A54SX08A A54SX16 A54SX32A
Text: Preliminary v1.1 SX-A Family FPGAs Leading Edge Performance • Configurable I/O Support for 3.3V/5.0V PCI, LVTTL, and TTL • Configurable Weak Resistor Pullup or Pulldown for Tri-Stated Outputs at Power Up • 250 MHz System Performance • 4ns Clock-to-Out Pin-to-Pin
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54SX72
Abstract: FBGA-484 A54SX32APQ208 A54SX16A
Text: Preliminary v1.1 SX-A Family FPGAs Leading Edge Performance • Configurable I/O Support for 3.3V/5.0V PCI, LVTTL, and TTL • Configurable Weak Resistor Pullup or Pulldown for Tri-Stated Outputs at Power Up • 250 MHz System Performance • 4ns Clock-to-Out Pin-to-Pin
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Original
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VeriBes24
54SX72
FBGA-484
A54SX32APQ208
A54SX16A
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PDF
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Untitled
Abstract: No abstract text available
Text: DIGITAL D ELAY M O D U LES 31 A , 34A Series 5 Tap ami Triple Independent 14 Pin Moulded DIP DUAL-IN-LINE PACKAGE TOP VIEW □ Schottky TTL buffered □ 14 pin package □ Low profile □ TTL compatible □ industry standard pin-outs description The 31A and 34A series of Digital Delay Modules are Schottky TTL buffered
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OCR Scan
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PDF
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Untitled
Abstract: No abstract text available
Text: DUAL-IN-LINE PACKAGE TOP VIEW □ Advanced Low-Power Schottky TTL buffered □ 14 pin package □ Low profile □ TTL compatible □ Industry standard pin-outs description The 31L and 34L series of Digital Delay Modules are Advanced Low-Power Schottky TTL buffered delay lines providing precise delay times and direct
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OCR Scan
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34L-010
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PDF
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31A-5101
Abstract: 34A-100 Delay Modules til 31a 31A-5151 431a 300C 34A-010 digital delay 31-A-5101
Text: DIGrTAL DELAY MODULES 31 A, 34A Series 5 Tap and Triple Independent 14 Pin Moulded DIP DUAL-IN-LINE P A C K A G E TOP VIEW □ Schottky TTL buffered □ 14 pin package □ Low profile □ TTL compatible □ Industry standard pin-outs 3 4 A - S E R IE S 31 A - S E R IE S
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termin01
4A-010
4A-060
4A-100
31A-5101
34A-100
Delay Modules
til 31a
31A-5151
431a
300C
34A-010
digital delay
31-A-5101
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PDF
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Untitled
Abstract: No abstract text available
Text: DUAL-IN-LINE PACKAGE TOP VIEW □ Schottky TTL buffered □ 14 pin package □ Low profile □ TTL compatible □ Industry standard pin-outs 34A - SERIES 31A - SERIES Vcc 14 TAP1 12 TAP3 10 Vcc 14 OUT1 12 OUT2 10 ppp 4 TAP2 6 7 TAP4 GND 1 IN1 3 IN2 5 IN3
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PDF
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82S191
Abstract: PB42
Text: NEC fjiPB429 2,048 X 8-BIT BIPOLAR TTL PROM NEC Electronics Inc. Revision 1 Pin Configuration D escriptio n The |xPB429 is a high-speed, electrically programmable, fully decoded 16384-bit TTL read-only memory. On-chip address decoding, three chip-select inputs and
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OCR Scan
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uPB429
xPB429
16384-bit
jiPB429)
xPB429
82S191
PB42
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PDF
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Untitled
Abstract: No abstract text available
Text: MXIC [P^EUMOliMlFâY MX27L512 51 2K-BIT CB4K x 8 LOW VOLTAGE OPERATION CMOS EPROM FEATURES Completely TTL compatible Operating current: 10mA @ 3.6V Standby current: 10|iA Package type: - 28 pin ceramic DIP, plastic DIP - 32 pin PLCC programming outside from the system, existing EPROM
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OCR Scan
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120/150/200/250ns
MX27L512
MX27L512
512K-bit,
single28
0-A15
PM0256
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PDF
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x27c
Abstract: No abstract text available
Text: MXIC MX27C256 256K-BIT 32K x 8 CMOS EPROM FEATURES • • • • • Completely TTL compatible Operating current: 30mA Standby current: 100|aA Package type: - 28 pin ceramic DIP, plastic DIP, plastic SOP - 32 pin PLCC - 28 pin 8 x 13.4mm TSOP(I) 32K x 8 organization
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OCR Scan
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MX27C256
256K-BIT
MX27C256
256K-bit,
x27c
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PDF
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Untitled
Abstract: No abstract text available
Text: Series 7580 C M O S , 12-Bit General Purpose D/A Converters Both models include an internal reference and both can be driven from either TTL or CM O S logic. Their outstanding features include: • Low cost for a com plete converter ■ Pin-for-pin replacement for D AC 80
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OCR Scan
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12-Bit
7580I
12-bit
7280I
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PDF
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AN 7580 circuit diagram
Abstract: Beckman 7580 Beckman BECKMAN 7580V sp beckman Beckman resistor network
Text: Series 7580 C M O S , 12-Bit General Purpose D/A Converters Both models include an internal reference and both can be driven from either TTL or C M O S logic. Their outstanding features include: • Low cost for a com plete converter ■ Pin-for-pin replacement for D AC80
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OCR Scan
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12-Bit
7580I
AN 7580 circuit diagram
Beckman 7580
Beckman
BECKMAN 7580V
sp beckman
Beckman resistor network
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PDF
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Untitled
Abstract: No abstract text available
Text: NEC NEC Electronics Inc. |xPB426 1,024 X 4-BIT BIPO LAR TTL PROM Revision 1 D e scriptio n Pin Configuration The M-PB426 is a high-speed, electrically programmable, fully decoded 4096-bit TTL read-only m em ory. On-chip address decoding, two chip-select inputs and three-state
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OCR Scan
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uPB426
4096-bit
PB426
xPB426
fiPB426)
18-leadTypical
95O-00S9-03C)
fiPB426
-18P20
MPP-80S
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PDF
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Untitled
Abstract: No abstract text available
Text: Intelligent Positioning Stepper Motor Controller The CY512 intelligent positioning stepper m otor controller is a standard 5 volt, 40 pin LSI device configured to control any 4-phase stepper motor. The CY512 will interface to any com puter using parallel TTL input and provides numerous TTL inputs and outputs for auxiliary
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CY512
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PDF
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Untitled
Abstract: No abstract text available
Text: m ie [P^EyMOlìMlìW M X27L4000 •4M-BIT 51SK x 8] LOW VOLTAGE OPERATION CMOS EPROM FEATURES Completely TTL compatible Operating current: 30mA @ 3.6V Standby current: 100(xA Package type: - 32 pin ceramic DIP, plastic DIP - 32 pin PLCC/SOP GENERAL DESCRIPTION
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150/200/250ns
X27L4000
MX27L4000
PM00255
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PDF
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Untitled
Abstract: No abstract text available
Text: FINAL COM’L: -5/7/B/B-2/A, 10/2 a Advanced Micro Devices PAL20R8 Family 24-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 5-ns propagation delay ■ Power-up reset for initialization ■ Popular 24-pin architectures: 20L8, 20R8, 20R6, 20R4
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PAL20R8
24-Pin
28-pin
PAL20L8,
PAL20R8,
PAL20R6,
PAL20R4)
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PDF
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4Kx8 rom ttl
Abstract: 2332 eprom 2332 rom 4k 2364A 4kx8 rom NCR Microelectronics Division 2332 rom accessing 4Kx8 rom 24 pin NCR2364A
Text: • • • • 2364A 64K BANK SELECTABLE ROM f 64K Mask Programmable ROM Organized as two-4Kx8 Banks Fully Static 5 Volt Operation Maximum Access Time . . . 450 ns • • • • JEDEC Standard Pin-Out Fully TTL Compatible Pin Compatible with 2332 Type ROMs
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PDF
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Untitled
Abstract: No abstract text available
Text: FINAL COM’L: -4/5/7/B/B-2/A, D/2 Zi Advanced Micro Devices PAL16R8 Family 20-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 4.5 ns maximum propagation delay ■ Power-up reset for initialization ■ Popular 20-pin architectures: 16L8,16R8,16R6,
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OCR Scan
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PAL16R8
20-Pin
28-Pin
PAL16L8,
PAL16R8,
PAL16R6,
PAL16R4)
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PDF
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EPM5130
Abstract: No abstract text available
Text: EPM5130 EPLD □ High-density 128-macrocell general-purpose MAX 5000 EPLD □ 128 macrocells optim ized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components □ High pin count for 16- or 32-bit data paths □ 256 shareable expander product terms
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OCR Scan
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EPM5130
128-macrocell
32-bit
16-bit
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PDF
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qt6t9M
Abstract: qt12 QT6T capacitor 0.01 j 100 MKT QT1T
Text: MKT/CCOX 8-90 sa I m ''i vi . .-i I1IM A J»»IliM ••."¡y/ LOGIC FAMILY - > TTL INPUT VOLTAGE -> 5XW CMOS 5.0V- 10.0V EQUIVALENT MIL-O-P/N M 55310/XX PIN CONNECTIONS »] »1 f « Ï» ÏM I PCKG. QT1 TO 5 8 4/4 5 /09 - TTL & /12 - CMOS
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OCR Scan
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55310/XX
z-60MHz
KHz-60
QT6T9M-20
qt6t9M
qt12
QT6T
capacitor 0.01 j 100 MKT
QT1T
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PDF
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