VLIW architecture
Abstract: vliw vector multiplication accumulation unit register file FLOATING POINT Co Processor
Text: Features • • • • • • • • • • • • • • High-performance, Modular Very-long Instruction Word VLIW Core 1G Flops - 1.4 Gops at 100 MHz VLIW Program Memory: 2K Words - typical width 128 bits Data Register File: Two Banks of 256 40-bit Registers with 4-input/4-output Ports for
|
Original
|
PDF
|
40-bit
31-bit
32-bit
1310AS
VLIW architecture
vliw vector
multiplication accumulation unit
register file
FLOATING POINT Co Processor
|
smr 40000c circuit
Abstract: SMR 40000c VID 200-12 S4 STRD 1806 AT572D940 CHANNEL22 16X64 Dot Matrix LCD 2x16, 16 pin up, 16 pin down Module Date Code AT572D940HF ptz decoder
Text: Features • DIOPSIS Dual Core System Integrating an ARM926EJ-S ARM® Thumb® Processor • • • • Core and a MagicV of VLIW Magic DSP™ is optimized for Audio, Communication and Beam-forming Applications High Performance MagicV VLIW DSP – 1 GFLOPS - 1.6 Gops at 100 MHz
|
Original
|
PDF
|
ARM926EJ-STM
40-bit
32-bit
smr 40000c circuit
SMR 40000c
VID 200-12 S4
STRD 1806
AT572D940
CHANNEL22
16X64 Dot Matrix
LCD 2x16, 16 pin up, 16 pin down Module Date Code
AT572D940HF
ptz decoder
|
VIA ARM926
Abstract: AT572D940HF ARM926 940HF BATM Advanced Communications bi 370 transistor PIO-96 ARM926EJS ARM926EJ-S ISO7816
Text: Features • DIOPSIS Dual Core System Integrating an ARM926EJ-S ARM® Thumb® Processor • • • • • • Core and a mAgicV VLIW DSP of the Magic DSP™ family, optimized for Audio, Communication and Beam-forming Applications High Performance MagicV VLIW DSP
|
Original
|
PDF
|
ARM926EJ-STM
40-bit
32-bit
7010AS
VIA ARM926
AT572D940HF
ARM926
940HF
BATM Advanced Communications
bi 370 transistor
PIO-96
ARM926EJS
ARM926EJ-S
ISO7816
|
STB6000
Abstract: STI5100 stv0299 STi5301-Mboard stv0299 application ST231 ST230 STI5301 SMARTCARD directv express card DVB
Text: STi5301 High-performance set-top box decoder DATA BRIEF DESCRIPTION The new MPEG-2 decoder from ST provides a step-change in performance for pay TV set-top boxes and digital video recorders. Delivering 1.33 GOPS of processing power through an ST230 VLIW CPU running at 333 MHz,
|
Original
|
PDF
|
STi5301
ST230
STi5301
STB6000
STI5100
stv0299
STi5301-Mboard
stv0299 application
ST231
SMARTCARD directv
express card DVB
|
STI5300-DVB
Abstract: stv0299 stb6000 STI5100 STi5300-Mboard SMARTCARD directv stv0299 application USB Host MP3 decoder vliw gops STI5300ZUA
Text: STi5300 High-performance set-top box decoder DATA BRIEF DESCRIPTION The new STi5300 MPEG-2 decoder from ST provides a step-change in performance for pay TV set-top boxes and digital video recorders. Delivering 1.33 GOPS of processing power through an ST230 VLIW CPU running at 333 MHz,
|
Original
|
PDF
|
STi5300
STi5300
ST230
STI5300-DVB
stv0299
stb6000
STI5100
STi5300-Mboard
SMARTCARD directv
stv0299 application
USB Host MP3 decoder
vliw gops
STI5300ZUA
|
MSH 14 Connectors
Abstract: 74ABT2244 ADSP-TS001 DA10 BR17
Text: DSP Microcomputer ADSP-TS001 a Preliminary Technical Data KEY FEATURES • • Static superscalar architecture combines and balances RISC, VLIW, and DSP functionality to provide: • Load and store architecture that supports 32-, 64-, or 128-bit data through direct or broadcast
|
Original
|
PDF
|
ADSP-TS001
128-bit
32-bit
ADSP-TS001.
MSH 14 Connectors
74ABT2244
ADSP-TS001
DA10
BR17
|
VLIW architecture
Abstract: coder bt.656 IEC958 MAP-1000 JBIG DECODER mpeg2 coder ANALOG DEVICES ASSEMBLY DATE CODE MAP1000A equator VLIW architecture Media process VLIW
Text: The MAP-CA VLIW-based Media Processor From Equator Technologies Inc and Hitachi Ltd. Chris Basoglu, PhD*, Karl Zhao, PhD*, Keiji Kojima †, Atsuo Kawaguchi† * Equator Technologies, Inc. 1300 White Oaks Road Campbell, CA 98008 † Hitachi, Ltd., Systems Development Laboratory
|
Original
|
PDF
|
|
STB6000
Abstract: STV0299 STI5100 SPI SMARTCARD directv STI5100 stv0299 application dvb circuit STi5300-Mboard stv0299 datasheet ST230
Text: STi5300 High-performance set-top box decoder DATA BRIEF DESCRIPTION The new STi5300 MPEG-2 decoder from ST provides a step-change in performance for pay TV set-top boxes and digital video recorders. Delivering 1.33 GOPS of processing power through an ST230 VLIW CPU running at 333 MHz,
|
Original
|
PDF
|
STi5300
STi5300
ST230
STB6000
STV0299
STI5100 SPI
SMARTCARD directv
STI5100
stv0299 application
dvb circuit
STi5300-Mboard
stv0299 datasheet
|
tigersharc
Abstract: 50-Tap X32A BR17
Text: DSP Microcomputer ADSP-TS001 a Preliminary Technical Data KEY FEATURES • • Static superscalar architecture combines and balances RISC, VLIW, and DSP functionality to provide: • Load and store architecture that supports 32-, 64-, or 128-bit data through direct or broadcast
|
Original
|
PDF
|
ADSP-TS001
32-bit
128-bit
ADSP-TS001
tigersharc
50-Tap
X32A
BR17
|
AGU1
Abstract: ISA S20 IEEE754 0x3F80000000
Text: Feature Summary • • • • • • • • • • • • • • • 1.0 GFLOPS - 1.5 GOPS at 100 MHz AHB Master Port, integrated DMA Engine and AHB Slave Port VLIW Architecture with five Independent Execution Units Up to 10 Arithmetic Operations per Cycle 4 Multiply, 2 Add/Subtract, 1 Add, 1 Subtract
|
Original
|
PDF
|
40-bit
32-bit
16-port
128-register
AGU1
ISA S20
IEEE754
0x3F80000000
|
iso07816 protocol
Abstract: dmo 365 r dmo 465 0xFFFF0008 AT572D740 ARF7 dmo 365 rb dmo 365 dps 8000 IEEE 1284B
Text: • Dual-core System Integrating an ARM7TDMI ARM® Thumb® Processor Core and a mAgic DSP for Audio, Communication and Beam-forming Applications • High-performance DSP Operating at 100 MHz • • • • • – 1 GFLOPS - 1.5 Gops – 10 Arithmetic Operations per Cycle 4 Multiply, 2 Add/subtract, 1 Add, 1 Subtract
|
Original
|
PDF
|
32-bit
40-bit
iso07816 protocol
dmo 365 r
dmo 465
0xFFFF0008
AT572D740
ARF7
dmo 365 rb
dmo 365
dps 8000
IEEE 1284B
|
AF11 Transistors
Abstract: D740 ARM pin configuration AT572D740 ATMEL 740 8Kx128 ARMA FUNCTION SIGNAL GENERATOR bi-03
Text: Features • Dual Core System Integrating an ARM7TDMI ARM Thumb Processor Core and a mAgic DSP for Audio, Communication and Beam-forming Applications • High Performance DSP Operating at 100 MHz • • • • • – 1 GFLOPS - 1.5 Gops – 10 Arithmetic Operations per Cycle 4 Multiply, 2 Add/subtract, 1 Add, 1 Subtract
|
Original
|
PDF
|
32-bit
40-bit
7001AS
AF11 Transistors
D740
ARM pin configuration
AT572D740
ATMEL 740
8Kx128
ARMA FUNCTION SIGNAL GENERATOR
bi-03
|
2x64b
Abstract: storm-1 SP16HP VLIW G220 SP16HP-G220 4x4 cross SP16HP- G220
Text: Stream Processors, Inc. parallel processing made simple Parallel Processing Simplified ― TM Storm-1 SP16HP: A 112 GMAC, C-programmable Media and Signal Processor Bill Dally Founder and Chief Scientist, Stream Processors, Inc. Professor and Chairman, CS Dept, Stanford University
|
Original
|
PDF
|
SP16HP:
SP16HP-G220,
2x64b
storm-1
SP16HP
VLIW
G220
SP16HP-G220
4x4 cross
SP16HP- G220
|
MAPCA2000
Abstract: X32B DSA00152780 hitachi PLC equator VLIW architecture ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder TV Tuner phillips 21 IEC958 free home theater circuit diagram for assemble
Text: Media Accelerated Processor for Consumer Appliances MAP-CA2000 Data Sheet DS#00006 2/5/2000 MAP-CA2000 Overview MAP-CA2000™ - Media Accelerated Processor for Consumer Appliances- offers a highly integrated single chip solution for multimedia products such as set-top boxes, digital TVs, video conferencing systems, medical imaging products, digital video
|
Original
|
PDF
|
MAP-CA2000TM
MAP-CA2000
MAP-CA2000
128-bit
MAPCA2000
X32B
DSA00152780
hitachi PLC
equator VLIW architecture
ac3 decoder toslink
PAL to ITU-R BT.601/656 Decoder
TV Tuner phillips 21
IEC958
free home theater circuit diagram for assemble
|
|
|
dvd drive controller
Abstract: TC94A33F Visconti Toshiba Media embedded Processor vlc media player coding and form design MEP core Toshiba visconti TA1363AFG TA1363 dvd streamer
Text: 2005-1 PRODUCT GUIDE Introduction to the MeP Media embedded Processor semiconductor http://www.semicon.toshiba.co.jp/eng Toshiba’s Media embedded Processor (MeP) serves as a platform for digital media processing applications. This brochure provides an overview of the general concepts and
|
Original
|
PDF
|
MIPS32
dvd drive controller
TC94A33F
Visconti
Toshiba Media embedded Processor
vlc media player coding and form design
MEP core
Toshiba visconti
TA1363AFG
TA1363
dvd streamer
|
NTSC Encoders
Abstract: equator VLIW architecture ac3 decoder toslink PAL to ITU-R BT.601/656 Decoder BGA352 CCIR656 IEC958 ITU656 RS-343A free home theater circuit diagram for assemble
Text: Equator Hardware Reference MAP-CA DSP Datasheet Equator Technologies, Inc. June 20, 2001 Document Number: HWR.CA.DS.2001.06.20 Equator Hardware Reference MAP-CA DSP Datasheet June 20, 2001 Copyright 2000 - 2001 Equator Technologies, Inc., and Hitachi, Ltd.
|
Original
|
PDF
|
|
SP16HP-G220
Abstract: h.264 encode TSMC flash compiler 1080p30 video processor SP16HP rapide BT.1120 BT.656 to h.264 storm interface CMOS Sensor to H.264
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP16HP-G220 Product Brief Target Applications • HD video conferencing The highest-performance member of SPI’s groundbreaking Storm-1 family, the SP16HP-G220 device is targeted for very high-performance signal processing applications that
|
Original
|
PDF
|
SP16HP-G220
SP16HP-G220
896-pin,
PB005-SP16HP
h.264 encode
TSMC flash compiler
1080p30 video processor
SP16HP
rapide
BT.1120
BT.656 to h.264
storm interface
CMOS Sensor to H.264
|
16 bit alu design for dsp
Abstract: rgb sensor spi bus BT.1120 cmos 4072 8 PIN 4072 vliw gops SMPTE260M storm-1
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP16HP-G220 Product Brief Target Applications • HD video conferencing The top performing member of the Storm-1 series, the SP16HPG220 is designed to meet the performance requirements of the most demanding video, imaging, and signal processing
|
Original
|
PDF
|
SP16HP-G220
SP16HPG220
SP16HP-G220
SP16HP
896-pin,
PB005-SP16HP
16 bit alu design for dsp
rgb sensor spi bus
BT.1120
cmos 4072
8 PIN 4072
vliw gops
SMPTE260M
storm-1
|
H.264 encoder ethernet
Abstract: BT.1120 Mpixel ip camera vliw gops SP8LP-G30 storm-1 storm interface Application
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP8LP-G30 Product Brief Target Applications The Storm-1 SP8LP-G30 stream processor targets price-sensitive and demanding signal processing applications that need the flexibility of software programmability, such as professional grade
|
Original
|
PDF
|
SP8LP-G30
SP8LP-G30
SP16HP
480-pin,
PB004-SP8LP
H.264 encoder ethernet
BT.1120
Mpixel
ip camera
vliw gops
storm-1
storm interface Application
|
SP16-G160
Abstract: BT.1120 storm-1 H.264 encoder ethernet MIPs datasheet SP16 vliw gops PB005-SP16HP Stream Processors
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP16-G160 Product Brief Target Applications The SP16-G160 is designed for high-performance signal processing, video, and imaging applications. The SP16-G160’s combination of leading DSP performance and C programming
|
Original
|
PDF
|
SP16-G160
SP16-G160
896-pin,
PB005-SP16HP
BT.1120
storm-1
H.264 encoder ethernet
MIPs datasheet
SP16
vliw gops
PB005-SP16HP
Stream Processors
|
H.264 encoder ethernet
Abstract: TSMC flash compiler SMPTE260M SP8-G80 storm-1 TSMC Flash TSMC embedded Flash
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP8-G80 Target Applications Product Brief SPI’s fully software programmable SP8-G80 device targets demanding signal processing, video, and imaging applications. Based on an efficient stream processing architecture, the
|
Original
|
PDF
|
SP8-G80
SP8-G80
896-pin,
PB003-SP8
H.264 encoder ethernet
TSMC flash compiler
SMPTE260M
storm-1
TSMC Flash
TSMC embedded Flash
|
SP8-G80
Abstract: BT.1120 H.264 encoder ethernet uboot SD SP8LP-G30 storm-1
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP8-G80 Product Brief Target Applications SPI’s fully software programmable SP8-G80 device targets demanding signal processing, video, and imaging applications. Based on an efficient stream processing architecture, the
|
Original
|
PDF
|
SP8-G80
SP8-G80
896-pin,
PB-SP8-G80-001
BT.1120
H.264 encoder ethernet
uboot SD
SP8LP-G30
storm-1
|
H.264 encoder ethernet
Abstract: storm-1 ip camera SP8LP SP8LP-G30
Text: Storm-1 Stream Processors Parallel Processing. Made Simple. SP8LP-G30 Product Brief Target Applications • Single-chip intelligent IP camera The Storm-1 SP8LP-G30 stream processor targets price-sensitive and demanding signal processing applications that need the flexibility
|
Original
|
PDF
|
SP8LP-G30
SP8LP-G30
480-pin,
PB004-SP8LP
H.264 encoder ethernet
storm-1
ip camera
SP8LP
|
8x8 DCT verilog code h.264
Abstract: verilog coding for deblocking filter G220 h.264 deblocking verilog code storm-1 vhdl code for 16*16 crossbar switch vliw gops H.264 encoder ethernet JPEG2000 SP16
Text: White Paper Stream Processing: Enabling the new generation of easy to use, high-performance DSPs "By re-thinking the roles of the architecture, programming model and compiler tools, SPI has created a new class of DSPs that makes parallel processing practical."
|
Original
|
PDF
|
|