DSAUD0072588.pdf by National Semiconductor

Partial File Text General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifie
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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LP2996 LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX LP2996MX

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