DSAEDA000125651.pdf
by Maxim Integrated Products
- 19-2538; Rev 2; 10/02 1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features o 50ps (max) Output-to-Output Skew o 1.5psRMS (max) Random Jitter o Guaranteed 300mV Differential Output
- Original
- No
- Unknown
- Obsolete
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