DSASW00421932.pdf by Zarlink Semiconductor

Partial File Text MT90880/1/2/3 TDM to Packet Processors Data Sheet Features December 2004 · WAN interface, consisting of 32 input and output streams at 2.048 or 8.192 Mbs · Up to 1024 bi-directional
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an5791 MT90880 Non Pipelined Processor the RMII Consortium Specification