DSA0077284.pdf
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Cypress Semiconductor
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CY7C1380A
CY7C1382A
PRELIMINARY
512K x 36 / 1M x 18 Pipelined SRAM
Features
inputs, address-pipelining Chip Enable (CE), burst control inputs (ADSC, ADSP, and ADV), write enables (BWa, BWb,
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Original
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