DSA00294625.pdf
by Integrated Circuit Systems
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Integrated Circuit Systems, Inc.
LOW SKEW, ÷1, ÷2 CLOCK GENERATOR
FEATURES
· 15 single ended LVCMOS outputs, 7 typical output impedance · Selectable LVCMOS or LVPECL clock inputs · CLK0 and CLK1
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Original
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No
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Unknown
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Transferred
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