Scans-006204.pdf by Not Available

Partial File Text ï»¿LS TTL DN74LS Series DN74LS73 DN74LS73 Dual J-K Flip-Flops (with Reset) â Description DN74LS73 contains two negative-edge triggered J-K flip-flop circuit, each with independent clock CP, J,
Datasheet Type Scan
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

Scans-006204.pdf preview

Download Datasheet

User Tagged Keywords

delay reset flip flop DN74LS73 flip flop jk flip flop T Toggle j-k flip flop clock toggle JK flip flop toggle MA161 T flip flop pin configuration

Price & Stock Powered by