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    DSA0074092.pdf

    • Silicon Laboratories
    • C8051F060/1/2/3 Mixed Signal ISP FLASH MCU Family HIGH SPEED 8051 µC CORE - Pipelined Instruction Architecture; Executes 70% of ANALOG PERIPHERALS - Two 16-Bit SAR ADCs · 16-Bit Resolution ·
    • Original
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    DSA0074092.pdf preview Download Datasheet

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