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Partial File Text ï»¿AVG Semiconductors DDiâ¢ Technical Data Dual 2-Wide 2-lnput/ 3-lnput AND-OR-lnvert Gate DV74LS51 DV74ALS51 This device performs the logic Y1=(A1B1C1) + (D1E1F1) and V2=(A2B2) + (C2D2) â¢ AV
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