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DSA00299956.pdf
by Central Semiconductor
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PROCESS CP709 Power Transistor PNP - Low Saturation Transistor Chip PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 41.3 x 41.3 MILS Die Thickness 9.0 MILS Base Bondin
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Unknown
Pb Free
Unknown
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CMPT7090L
CMXT7090L
CP709
CXT7090L
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