DSA00923499.pdf
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Xilinx
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0
R
XC95288 In-System Programmable CPLD
0 5
DS069 (v4.2) April 15, 2005
Product Specification
Features
· · · · · 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz 288 macrocell
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Original
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