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DSAE0067724.pdf
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QuickLogic
Partial File Text
QL3040 / QL3040R 40,000 Usable PLD Gate pASICĀ®3 FPGA Combining High Performance and High Density PRELIMINARY DATA February, 1998 2 ... 40,000 usable PLD gates, 252 I/O pins 20,736 bit
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User Tagged Keywords
PB256
PQ208
QL3040
QL3040-1PQ208C