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    DSA00102495.pdf by Xilinx

    • P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 D2 A4 D1 D0 S1-55 S1-52 S1-50 S1-49 TTL1 P1 D4 B1 S1-56 S1-60 D6 TTL2 TTL5 D5 C1 C2 TTL4
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