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DSAE0061700.pdf
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QuickLogic
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pASIC Macro Library HIGHLIGHTS More than 350 Architecturally Optimized Macros Includes Simple Gates and Advanced Soft Macros Includes Over 100 7400-Series TTL Building Blocks SpDE Packs as Ma
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ECAD Model
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16 bit adder
16 bit full adder
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2 bit magnitude comparator using 2 xor gates
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3-input-XOR
32 bit adder
32 bit ripple carry adder
4 bit binary full adder and subtractor
4 bit binary multiplier
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7400 datasheet 2-input nand gate
7400 datasheet 4-input nand gate
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7400-series
7400series
8 bit adder and subtractor
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8 bit binary to 7 segment
8 bit Parallel-Out Shift Register
8 bit XOR Gates
BCD adder and subtractor
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bcd to hex decoder
CI 7400
datasheets of the basic logic gates
datasheets of the subtractor using basic logic gate
design of 16-1 multiplexer
dual tristate xor gate
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full subtractor decoder using xor and nand gates
HALF ADDER
half adder using x-OR and NAND gate
magnitude comparator using a subtractor
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TRIPAD16
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TTL 7400
TTL 7400 3 input
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up down counter
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XOR en TTL