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DSA00337593.pdf
by Xilinx
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Application Note: FPGAs R XAPP181 (v1.0) March 15, 2000 SEU Mitigation Design Techniques for the XQR4000XL Author: Phil Brinkley, Avnet and Carl Carmichael Summary This Application Note
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"XOR Gate"
2 bit magnitude comparator using 2 xor gates
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XC4062XL
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