DSAFRAZ004508.pdf
- Xilinx
- ® XC95108 In-System Programmable CPLD March, 1997 (Version 1.1) Product Specification Features Power Management · 7.5 ns pin-to-pin logic delays on all pins · fCNT to 125 MHz · 10
- Original
-
Price & Stock Powered by
Findchips
