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    74HC73DB,112 datasheet Part Img

    • NXP Semiconductors
    • Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; F<sub>max</sub>: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Tube
    • Original
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    74HC73DB,112 datasheet preview Download Datasheet

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