74LVT16500ADGG,118 datasheet by NXP Semiconductors

Description 3.3 V 18-bit universal bus transceiver; 3-state - Description: 3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; F<sub>max</sub>: 350 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: -32/+64 mA ; Propagation delay: 1.9@3.3V ns; Voltage: 2.7-3.6 V; Package: SOT364-1 (TSSOP56); Container: Reel Pack, SMD, 13"
Datasheet Type Original
RoHS Yes
Pb Free Unknown
Lifecycle Obsolete
Price & Stock
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74LVT16500ADGG,118 datasheet preview Download Datasheet