DSA0059723.pdf by Alliance Semiconductor

Partial File Text April 2001 AS4LC4M4E1 ® 4Mx4 CMOS DRAM (EDO)3.3V Family Features · Refresh - 2048 refresh cycles, 32 ms refresh interval - RAS-only or CAS-before-RAS refresh or self-refresh · TTL-compatib
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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