DSA00169564.pdf by Cypress Semiconductor

Partial File Text CY7C1646KV18, CY7C1657KV18 CY7C1648KV18, CY7C1650KV18 144-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 144-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Laten
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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