DSA00165391.pdf
by Cypress Semiconductor
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PRELIMINARY
CY7C1310CV18 CY7C1910CV18 CY7C1312CV18 CY7C1314CV18
18-Mbit QDR-IITM SRAM 2-Word Burst Architecture
Features
ยท Separate Independent Read and Write data ports -- Supports concurrent
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Original
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