DSA00314617.pdf by Cypress Semiconductor

Partial File Text CY7C1481V33 CY7C1483V33 CY7C1487V33 ADVANCE INFORMATION 2M x 36/4M x 18/1M x 72 Flow-through SRAM Features positive-edge-triggered clock input (CLK). The synchronous inputs include all a
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CY7C1481V33 CY7C1483V33 CY7C1487V33