DSA00164937.pdf by Cypress Semiconductor

Partial File Text CY7C1329H 2-Mbit (64K x 32) Pipelined Sync SRAM Features · Registered inputs and outputs for pipelined operation · 64K × 32 common I/O architecture · 3.3V core power supply · 2.5V I/O operation ·
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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