DSA00164425.pdf by Cypress Semiconductor

Partial File Text CY7C1333F 2-Mbit (64K x 32) Flow-through SRAM with NoBLTM Architecture Features · Can support up to 117-MHz bus operations with zero wait states. Data is transferred on every clock. · Pin compati
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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