DSA00164285.pdf
by Cypress Semiconductor
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PRELIMINARY
CY7C1311BV18 CY7C1313BV18 CY7C1315BV18
18-Mbit QDRTM-II SRAM 4-Word Burst Architecture
Features
ยท Separate Independent Read and Write data ports -- Supports concurrent transactions
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Original
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Unknown
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Unknown
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